2 * Copyright (c) 2009-2011 Wind River Systems, Inc.
3 * Copyright (c) 2011 ST Microelectronics (Alessandro Rubini, Davide Ciminaghi)
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12 * See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/device.h>
25 #include <linux/slab.h>
26 #include <linux/list.h>
28 #include <linux/ioport.h>
29 #include <linux/pci.h>
30 #include <linux/seq_file.h>
31 #include <linux/platform_device.h>
32 #include <linux/mfd/core.h>
33 #include <linux/mfd/sta2x11-mfd.h>
34 #include <linux/regmap.h>
36 #include <asm/sta2x11.h>
38 static inline int __reg_within_range(unsigned int r
,
42 return ((r
>= start
) && (r
<= end
));
45 /* This describes STA2X11 MFD chip for us, we may have several */
47 struct sta2x11_instance
*instance
;
48 struct regmap
*regmap
[sta2x11_n_mfd_plat_devs
];
49 spinlock_t lock
[sta2x11_n_mfd_plat_devs
];
50 struct list_head list
;
51 void __iomem
*regs
[sta2x11_n_mfd_plat_devs
];
54 static LIST_HEAD(sta2x11_mfd_list
);
56 /* Three functions to act on the list */
57 static struct sta2x11_mfd
*sta2x11_mfd_find(struct pci_dev
*pdev
)
59 struct sta2x11_instance
*instance
;
60 struct sta2x11_mfd
*mfd
;
62 if (!pdev
&& !list_empty(&sta2x11_mfd_list
)) {
63 pr_warn("%s: Unspecified device, using first instance\n",
65 return list_entry(sta2x11_mfd_list
.next
,
66 struct sta2x11_mfd
, list
);
69 instance
= sta2x11_get_instance(pdev
);
72 list_for_each_entry(mfd
, &sta2x11_mfd_list
, list
) {
73 if (mfd
->instance
== instance
)
79 static int sta2x11_mfd_add(struct pci_dev
*pdev
, gfp_t flags
)
82 struct sta2x11_mfd
*mfd
= sta2x11_mfd_find(pdev
);
83 struct sta2x11_instance
*instance
;
87 instance
= sta2x11_get_instance(pdev
);
90 mfd
= kzalloc(sizeof(*mfd
), flags
);
93 INIT_LIST_HEAD(&mfd
->list
);
94 for (i
= 0; i
< ARRAY_SIZE(mfd
->lock
); i
++)
95 spin_lock_init(&mfd
->lock
[i
]);
96 mfd
->instance
= instance
;
97 list_add(&mfd
->list
, &sta2x11_mfd_list
);
101 /* This function is exported and is not expected to fail */
102 u32
__sta2x11_mfd_mask(struct pci_dev
*pdev
, u32 reg
, u32 mask
, u32 val
,
103 enum sta2x11_mfd_plat_dev index
)
105 struct sta2x11_mfd
*mfd
= sta2x11_mfd_find(pdev
);
111 dev_warn(&pdev
->dev
, ": can't access sctl regs\n");
115 regs
= mfd
->regs
[index
];
117 dev_warn(&pdev
->dev
, ": system ctl not initialized\n");
120 spin_lock_irqsave(&mfd
->lock
[index
], flags
);
121 r
= readl(regs
+ reg
);
125 writel(r
, regs
+ reg
);
126 spin_unlock_irqrestore(&mfd
->lock
[index
], flags
);
129 EXPORT_SYMBOL(__sta2x11_mfd_mask
);
131 int sta2x11_mfd_get_regs_data(struct platform_device
*dev
,
132 enum sta2x11_mfd_plat_dev index
,
136 struct pci_dev
*pdev
= *(struct pci_dev
**)dev_get_platdata(&dev
->dev
);
137 struct sta2x11_mfd
*mfd
;
141 mfd
= sta2x11_mfd_find(pdev
);
144 if (index
>= sta2x11_n_mfd_plat_devs
)
146 *regs
= mfd
->regs
[index
];
147 *lock
= &mfd
->lock
[index
];
148 pr_debug("%s %d *regs = %p\n", __func__
, __LINE__
, *regs
);
149 return *regs
? 0 : -ENODEV
;
151 EXPORT_SYMBOL(sta2x11_mfd_get_regs_data
);
154 * Special sta2x11-mfd regmap lock/unlock functions
157 static void sta2x11_regmap_lock(void *__lock
)
159 spinlock_t
*lock
= __lock
;
163 static void sta2x11_regmap_unlock(void *__lock
)
165 spinlock_t
*lock
= __lock
;
169 /* OTP (one time programmable registers do not require locking */
170 static void sta2x11_regmap_nolock(void *__lock
)
174 static const char *sta2x11_mfd_names
[sta2x11_n_mfd_plat_devs
] = {
175 [sta2x11_sctl
] = STA2X11_MFD_SCTL_NAME
,
176 [sta2x11_apbreg
] = STA2X11_MFD_APBREG_NAME
,
177 [sta2x11_apb_soc_regs
] = STA2X11_MFD_APB_SOC_REGS_NAME
,
178 [sta2x11_scr
] = STA2X11_MFD_SCR_NAME
,
181 static bool sta2x11_sctl_writeable_reg(struct device
*dev
, unsigned int reg
)
183 return !__reg_within_range(reg
, SCTL_SCPCIECSBRST
, SCTL_SCRSTSTA
);
186 static struct regmap_config sta2x11_sctl_regmap_config
= {
190 .lock
= sta2x11_regmap_lock
,
191 .unlock
= sta2x11_regmap_unlock
,
192 .max_register
= SCTL_SCRSTSTA
,
193 .writeable_reg
= sta2x11_sctl_writeable_reg
,
196 static bool sta2x11_scr_readable_reg(struct device
*dev
, unsigned int reg
)
198 return (reg
== STA2X11_SECR_CR
) ||
199 __reg_within_range(reg
, STA2X11_SECR_FVR0
, STA2X11_SECR_FVR1
);
202 static bool sta2x11_scr_writeable_reg(struct device
*dev
, unsigned int reg
)
207 static struct regmap_config sta2x11_scr_regmap_config
= {
211 .lock
= sta2x11_regmap_nolock
,
212 .unlock
= sta2x11_regmap_nolock
,
213 .max_register
= STA2X11_SECR_FVR1
,
214 .readable_reg
= sta2x11_scr_readable_reg
,
215 .writeable_reg
= sta2x11_scr_writeable_reg
,
218 static bool sta2x11_apbreg_readable_reg(struct device
*dev
, unsigned int reg
)
220 /* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */
221 if (reg
>= APBREG_BSR_SARAC
)
222 reg
-= APBREG_BSR_SARAC
;
237 static bool sta2x11_apbreg_writeable_reg(struct device
*dev
, unsigned int reg
)
239 if (reg
>= APBREG_BSR_SARAC
)
240 reg
-= APBREG_BSR_SARAC
;
241 if (!sta2x11_apbreg_readable_reg(dev
, reg
))
243 return reg
!= APBREG_PAER
;
246 static struct regmap_config sta2x11_apbreg_regmap_config
= {
250 .lock
= sta2x11_regmap_lock
,
251 .unlock
= sta2x11_regmap_unlock
,
252 .max_register
= APBREG_EMU_PCG_SARAC
,
253 .readable_reg
= sta2x11_apbreg_readable_reg
,
254 .writeable_reg
= sta2x11_apbreg_writeable_reg
,
257 static bool sta2x11_apb_soc_regs_readable_reg(struct device
*dev
,
260 return reg
<= PCIE_SoC_INT_ROUTER_STATUS3_REG
||
261 __reg_within_range(reg
, DMA_IP_CTRL_REG
, SPARE3_RESERVED
) ||
262 __reg_within_range(reg
, MASTER_LOCK_REG
,
263 SYSTEM_CONFIG_STATUS_REG
) ||
264 reg
== MSP_CLK_CTRL_REG
||
265 __reg_within_range(reg
, COMPENSATION_REG1
, TEST_CTL_REG
);
268 static bool sta2x11_apb_soc_regs_writeable_reg(struct device
*dev
,
271 if (!sta2x11_apb_soc_regs_readable_reg(dev
, reg
))
274 case PCIE_COMMON_CLOCK_CONFIG_0_4_0
:
275 case SYSTEM_CONFIG_STATUS_REG
:
276 case COMPENSATION_REG1
:
277 case PCIE_SoC_INT_ROUTER_STATUS0_REG
...PCIE_SoC_INT_ROUTER_STATUS3_REG
:
278 case PCIE_PM_STATUS_0_PORT_0_4
...PCIE_PM_STATUS_7_0_EP4
:
285 static struct regmap_config sta2x11_apb_soc_regs_regmap_config
= {
289 .lock
= sta2x11_regmap_lock
,
290 .unlock
= sta2x11_regmap_unlock
,
291 .max_register
= TEST_CTL_REG
,
292 .readable_reg
= sta2x11_apb_soc_regs_readable_reg
,
293 .writeable_reg
= sta2x11_apb_soc_regs_writeable_reg
,
296 static struct regmap_config
*
297 sta2x11_mfd_regmap_configs
[sta2x11_n_mfd_plat_devs
] = {
298 [sta2x11_sctl
] = &sta2x11_sctl_regmap_config
,
299 [sta2x11_apbreg
] = &sta2x11_apbreg_regmap_config
,
300 [sta2x11_apb_soc_regs
] = &sta2x11_apb_soc_regs_regmap_config
,
301 [sta2x11_scr
] = &sta2x11_scr_regmap_config
,
304 /* Probe for the four platform devices */
306 static int sta2x11_mfd_platform_probe(struct platform_device
*dev
,
307 enum sta2x11_mfd_plat_dev index
)
309 struct pci_dev
**pdev
;
310 struct sta2x11_mfd
*mfd
;
311 struct resource
*res
;
312 const char *name
= sta2x11_mfd_names
[index
];
313 struct regmap_config
*regmap_config
= sta2x11_mfd_regmap_configs
[index
];
315 pdev
= dev_get_platdata(&dev
->dev
);
316 mfd
= sta2x11_mfd_find(*pdev
);
322 res
= platform_get_resource(dev
, IORESOURCE_MEM
, 0);
326 if (!request_mem_region(res
->start
, resource_size(res
), name
))
329 mfd
->regs
[index
] = ioremap(res
->start
, resource_size(res
));
330 if (!mfd
->regs
[index
]) {
331 release_mem_region(res
->start
, resource_size(res
));
334 regmap_config
->lock_arg
= &mfd
->lock
;
336 No caching, registers could be reached both via regmap and via
339 regmap_config
->cache_type
= REGCACHE_NONE
;
340 mfd
->regmap
[index
] = devm_regmap_init_mmio(&dev
->dev
, mfd
->regs
[index
],
342 WARN_ON(IS_ERR(mfd
->regmap
[index
]));
347 static int sta2x11_sctl_probe(struct platform_device
*dev
)
349 return sta2x11_mfd_platform_probe(dev
, sta2x11_sctl
);
352 static int sta2x11_apbreg_probe(struct platform_device
*dev
)
354 return sta2x11_mfd_platform_probe(dev
, sta2x11_apbreg
);
357 static int sta2x11_apb_soc_regs_probe(struct platform_device
*dev
)
359 return sta2x11_mfd_platform_probe(dev
, sta2x11_apb_soc_regs
);
362 static int sta2x11_scr_probe(struct platform_device
*dev
)
364 return sta2x11_mfd_platform_probe(dev
, sta2x11_scr
);
367 /* The three platform drivers */
368 static struct platform_driver sta2x11_sctl_platform_driver
= {
370 .name
= STA2X11_MFD_SCTL_NAME
,
372 .probe
= sta2x11_sctl_probe
,
375 static struct platform_driver sta2x11_platform_driver
= {
377 .name
= STA2X11_MFD_APBREG_NAME
,
379 .probe
= sta2x11_apbreg_probe
,
382 static struct platform_driver sta2x11_apb_soc_regs_platform_driver
= {
384 .name
= STA2X11_MFD_APB_SOC_REGS_NAME
,
386 .probe
= sta2x11_apb_soc_regs_probe
,
389 static struct platform_driver sta2x11_scr_platform_driver
= {
391 .name
= STA2X11_MFD_SCR_NAME
,
393 .probe
= sta2x11_scr_probe
,
396 static struct platform_driver
* const drivers
[] = {
397 &sta2x11_platform_driver
,
398 &sta2x11_sctl_platform_driver
,
399 &sta2x11_apb_soc_regs_platform_driver
,
400 &sta2x11_scr_platform_driver
,
403 static int __init
sta2x11_drivers_init(void)
405 return platform_register_drivers(drivers
, ARRAY_SIZE(drivers
));
409 * What follows are the PCI devices that host the above pdevs.
410 * Each logic block is 4kB and they are all consecutive: we use this info.
416 enum mfd0_bar0_cells
{
426 enum mfd0_bar1_cells
{
429 #define CELL_4K(_name, _cell) { \
431 .start = _cell * 4096, .end = _cell * 4096 + 4095, \
432 .flags = IORESOURCE_MEM, \
435 static const struct resource gpio_resources
[] = {
437 /* 4 consecutive cells, 1 driver */
438 .name
= STA2X11_MFD_GPIO_NAME
,
440 .end
= (4 * 4096) - 1,
441 .flags
= IORESOURCE_MEM
,
444 static const struct resource sctl_resources
[] = {
445 CELL_4K(STA2X11_MFD_SCTL_NAME
, STA2X11_SCTL
),
447 static const struct resource scr_resources
[] = {
448 CELL_4K(STA2X11_MFD_SCR_NAME
, STA2X11_SCR
),
450 static const struct resource time_resources
[] = {
451 CELL_4K(STA2X11_MFD_TIME_NAME
, STA2X11_TIME
),
454 static const struct resource apbreg_resources
[] = {
455 CELL_4K(STA2X11_MFD_APBREG_NAME
, STA2X11_APBREG
),
458 #define DEV(_name, _r) \
459 { .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }
461 static struct mfd_cell sta2x11_mfd0_bar0
[] = {
462 /* offset 0: we add pdata later */
463 DEV(STA2X11_MFD_GPIO_NAME
, gpio_resources
),
464 DEV(STA2X11_MFD_SCTL_NAME
, sctl_resources
),
465 DEV(STA2X11_MFD_SCR_NAME
, scr_resources
),
466 DEV(STA2X11_MFD_TIME_NAME
, time_resources
),
469 static struct mfd_cell sta2x11_mfd0_bar1
[] = {
470 DEV(STA2X11_MFD_APBREG_NAME
, apbreg_resources
),
476 enum mfd1_bar0_cells
{
481 enum mfd1_bar1_cells
{
482 STA2X11_APB_SOC_REGS
= 0,
485 static const struct resource vic_resources
[] = {
486 CELL_4K(STA2X11_MFD_VIC_NAME
, STA2X11_VIC
),
489 static const struct resource apb_soc_regs_resources
[] = {
490 CELL_4K(STA2X11_MFD_APB_SOC_REGS_NAME
, STA2X11_APB_SOC_REGS
),
493 static struct mfd_cell sta2x11_mfd1_bar0
[] = {
494 DEV(STA2X11_MFD_VIC_NAME
, vic_resources
),
497 static struct mfd_cell sta2x11_mfd1_bar1
[] = {
498 DEV(STA2X11_MFD_APB_SOC_REGS_NAME
, apb_soc_regs_resources
),
502 static int sta2x11_mfd_suspend(struct pci_dev
*pdev
, pm_message_t state
)
504 pci_save_state(pdev
);
505 pci_disable_device(pdev
);
506 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
511 static int sta2x11_mfd_resume(struct pci_dev
*pdev
)
515 pci_set_power_state(pdev
, PCI_D0
);
516 err
= pci_enable_device(pdev
);
519 pci_restore_state(pdev
);
524 struct sta2x11_mfd_bar_setup_data
{
525 struct mfd_cell
*cells
;
529 struct sta2x11_mfd_setup_data
{
530 struct sta2x11_mfd_bar_setup_data bars
[2];
533 #define STA2X11_MFD0 0
534 #define STA2X11_MFD1 1
536 static struct sta2x11_mfd_setup_data mfd_setup_data
[] = {
537 /* Mfd 0: gpio, sctl, scr, timers / apbregs */
541 .cells
= sta2x11_mfd0_bar0
,
542 .ncells
= ARRAY_SIZE(sta2x11_mfd0_bar0
),
545 .cells
= sta2x11_mfd0_bar1
,
546 .ncells
= ARRAY_SIZE(sta2x11_mfd0_bar1
),
550 /* Mfd 1: vic / apb-soc-regs */
554 .cells
= sta2x11_mfd1_bar0
,
555 .ncells
= ARRAY_SIZE(sta2x11_mfd1_bar0
),
558 .cells
= sta2x11_mfd1_bar1
,
559 .ncells
= ARRAY_SIZE(sta2x11_mfd1_bar1
),
565 static void sta2x11_mfd_setup(struct pci_dev
*pdev
,
566 struct sta2x11_mfd_setup_data
*sd
)
569 for (i
= 0; i
< ARRAY_SIZE(sd
->bars
); i
++)
570 for (j
= 0; j
< sd
->bars
[i
].ncells
; j
++) {
571 sd
->bars
[i
].cells
[j
].pdata_size
= sizeof(pdev
);
572 sd
->bars
[i
].cells
[j
].platform_data
= &pdev
;
576 static int sta2x11_mfd_probe(struct pci_dev
*pdev
,
577 const struct pci_device_id
*pci_id
)
580 struct sta2x11_mfd_setup_data
*setup_data
;
582 dev_info(&pdev
->dev
, "%s\n", __func__
);
584 err
= pci_enable_device(pdev
);
586 dev_err(&pdev
->dev
, "Can't enable device.\n");
590 err
= pci_enable_msi(pdev
);
592 dev_info(&pdev
->dev
, "Enable msi failed\n");
594 setup_data
= pci_id
->device
== PCI_DEVICE_ID_STMICRO_GPIO
?
595 &mfd_setup_data
[STA2X11_MFD0
] :
596 &mfd_setup_data
[STA2X11_MFD1
];
598 /* platform data is the pci device for all of them */
599 sta2x11_mfd_setup(pdev
, setup_data
);
601 /* Record this pdev before mfd_add_devices: their probe looks for it */
602 if (!sta2x11_mfd_find(pdev
))
603 sta2x11_mfd_add(pdev
, GFP_ATOMIC
);
605 /* Just 2 bars for all mfd's at present */
606 for (i
= 0; i
< 2; i
++) {
607 err
= mfd_add_devices(&pdev
->dev
, -1,
608 setup_data
->bars
[i
].cells
,
609 setup_data
->bars
[i
].ncells
,
614 "mfd_add_devices[%d] failed: %d\n", i
, err
);
622 mfd_remove_devices(&pdev
->dev
);
623 pci_disable_device(pdev
);
624 pci_disable_msi(pdev
);
628 static const struct pci_device_id sta2x11_mfd_tbl
[] = {
629 {PCI_DEVICE(PCI_VENDOR_ID_STMICRO
, PCI_DEVICE_ID_STMICRO_GPIO
)},
630 {PCI_DEVICE(PCI_VENDOR_ID_STMICRO
, PCI_DEVICE_ID_STMICRO_VIC
)},
634 static struct pci_driver sta2x11_mfd_driver
= {
635 .name
= "sta2x11-mfd",
636 .id_table
= sta2x11_mfd_tbl
,
637 .probe
= sta2x11_mfd_probe
,
638 .suspend
= sta2x11_mfd_suspend
,
639 .resume
= sta2x11_mfd_resume
,
642 static int __init
sta2x11_mfd_init(void)
644 pr_info("%s\n", __func__
);
645 return pci_register_driver(&sta2x11_mfd_driver
);
649 * All of this must be ready before "normal" devices like MMCI appear.
650 * But MFD (the pci device) can't be too early. The following choice
651 * prepares platform drivers very early and probe the PCI device later,
652 * but before other PCI devices.
654 subsys_initcall(sta2x11_drivers_init
);
655 rootfs_initcall(sta2x11_mfd_init
);
657 MODULE_LICENSE("GPL v2");
658 MODULE_AUTHOR("Wind River");
659 MODULE_DESCRIPTION("STA2x11 mfd for GPIO, SCTL and APBREG");
660 MODULE_DEVICE_TABLE(pci
, sta2x11_mfd_tbl
);