1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/nvmem-consumer.h>
13 #include <linux/platform_device.h>
14 #include <linux/pm_opp.h>
15 #include <linux/slab.h>
17 #define OCOTP_CFG3_SPEED_GRADE_SHIFT 8
18 #define OCOTP_CFG3_SPEED_GRADE_MASK (0x3 << 8)
19 #define IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK (0xf << 8)
20 #define OCOTP_CFG3_MKT_SEGMENT_SHIFT 6
21 #define OCOTP_CFG3_MKT_SEGMENT_MASK (0x3 << 6)
22 #define IMX8MP_OCOTP_CFG3_MKT_SEGMENT_SHIFT 5
23 #define IMX8MP_OCOTP_CFG3_MKT_SEGMENT_MASK (0x3 << 5)
25 /* cpufreq-dt device registered by imx-cpufreq-dt */
26 static struct platform_device
*cpufreq_dt_pdev
;
27 static struct opp_table
*cpufreq_opp_table
;
29 static int imx_cpufreq_dt_probe(struct platform_device
*pdev
)
31 struct device
*cpu_dev
= get_cpu_device(0);
32 u32 cell_value
, supported_hw
[2];
33 int speed_grade
, mkt_segment
;
36 if (!of_find_property(cpu_dev
->of_node
, "cpu-supply", NULL
))
39 ret
= nvmem_cell_read_u32(cpu_dev
, "speed_grade", &cell_value
);
43 if (of_machine_is_compatible("fsl,imx8mn") ||
44 of_machine_is_compatible("fsl,imx8mp"))
45 speed_grade
= (cell_value
& IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK
)
46 >> OCOTP_CFG3_SPEED_GRADE_SHIFT
;
48 speed_grade
= (cell_value
& OCOTP_CFG3_SPEED_GRADE_MASK
)
49 >> OCOTP_CFG3_SPEED_GRADE_SHIFT
;
51 if (of_machine_is_compatible("fsl,imx8mp"))
52 mkt_segment
= (cell_value
& IMX8MP_OCOTP_CFG3_MKT_SEGMENT_MASK
)
53 >> IMX8MP_OCOTP_CFG3_MKT_SEGMENT_SHIFT
;
55 mkt_segment
= (cell_value
& OCOTP_CFG3_MKT_SEGMENT_MASK
)
56 >> OCOTP_CFG3_MKT_SEGMENT_SHIFT
;
59 * Early samples without fuses written report "0 0" which may NOT
60 * match any OPP defined in DT. So clamp to minimum OPP defined in
61 * DT to avoid warning for "no OPPs".
63 * Applies to i.MX8M series SoCs.
65 if (mkt_segment
== 0 && speed_grade
== 0) {
66 if (of_machine_is_compatible("fsl,imx8mm") ||
67 of_machine_is_compatible("fsl,imx8mq"))
69 if (of_machine_is_compatible("fsl,imx8mn") ||
70 of_machine_is_compatible("fsl,imx8mp"))
74 supported_hw
[0] = BIT(speed_grade
);
75 supported_hw
[1] = BIT(mkt_segment
);
76 dev_info(&pdev
->dev
, "cpu speed grade %d mkt segment %d supported-hw %#x %#x\n",
77 speed_grade
, mkt_segment
, supported_hw
[0], supported_hw
[1]);
79 cpufreq_opp_table
= dev_pm_opp_set_supported_hw(cpu_dev
, supported_hw
, 2);
80 if (IS_ERR(cpufreq_opp_table
)) {
81 ret
= PTR_ERR(cpufreq_opp_table
);
82 dev_err(&pdev
->dev
, "Failed to set supported opp: %d\n", ret
);
86 cpufreq_dt_pdev
= platform_device_register_data(
87 &pdev
->dev
, "cpufreq-dt", -1, NULL
, 0);
88 if (IS_ERR(cpufreq_dt_pdev
)) {
89 dev_pm_opp_put_supported_hw(cpufreq_opp_table
);
90 ret
= PTR_ERR(cpufreq_dt_pdev
);
91 dev_err(&pdev
->dev
, "Failed to register cpufreq-dt: %d\n", ret
);
98 static int imx_cpufreq_dt_remove(struct platform_device
*pdev
)
100 platform_device_unregister(cpufreq_dt_pdev
);
101 dev_pm_opp_put_supported_hw(cpufreq_opp_table
);
106 static struct platform_driver imx_cpufreq_dt_driver
= {
107 .probe
= imx_cpufreq_dt_probe
,
108 .remove
= imx_cpufreq_dt_remove
,
110 .name
= "imx-cpufreq-dt",
113 module_platform_driver(imx_cpufreq_dt_driver
);
115 MODULE_ALIAS("platform:imx-cpufreq-dt");
116 MODULE_DESCRIPTION("Freescale i.MX cpufreq speed grading driver");
117 MODULE_LICENSE("GPL v2");