1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt control channel messages
5 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2017, Intel Corporation
12 #include <linux/types.h>
13 #include <linux/uuid.h>
23 TB_CFG_ERROR_PORT_NOT_CONNECTED
= 0,
24 TB_CFG_ERROR_LINK_ERROR
= 1,
25 TB_CFG_ERROR_INVALID_CONFIG_SPACE
= 2,
26 TB_CFG_ERROR_NO_SUCH_PORT
= 4,
27 TB_CFG_ERROR_ACK_PLUG_EVENT
= 7, /* send as reply to TB_CFG_PKG_EVENT */
28 TB_CFG_ERROR_LOOP
= 8,
29 TB_CFG_ERROR_HEC_ERROR_DETECTED
= 12,
30 TB_CFG_ERROR_FLOW_CONTROL_ERROR
= 13,
34 struct tb_cfg_header
{
36 u32 unknown
:10; /* highest order bit is set on replies */
40 /* additional header for read/write packets */
41 struct tb_cfg_address
{
42 u32 offset
:13; /* in dwords */
43 u32 length
:6; /* in dwords */
45 enum tb_cfg_space space
:2;
46 u32 seq
:2; /* sequence number */
50 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
52 struct tb_cfg_header header
;
53 struct tb_cfg_address addr
;
56 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
57 struct cfg_write_pkg
{
58 struct tb_cfg_header header
;
59 struct tb_cfg_address addr
;
60 u32 data
[64]; /* maximum size, tb_cfg_address.length has 6 bits */
63 /* TB_CFG_PKG_ERROR */
64 struct cfg_error_pkg
{
65 struct tb_cfg_header header
;
66 enum tb_cfg_error error
:4;
69 u32 zero2
:2; /* Both should be zero, still they are different fields. */
74 #define TB_CFG_ERROR_PG_HOT_PLUG 0x2
75 #define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3
77 /* TB_CFG_PKG_EVENT */
78 struct cfg_event_pkg
{
79 struct tb_cfg_header header
;
85 /* TB_CFG_PKG_RESET */
86 struct cfg_reset_pkg
{
87 struct tb_cfg_header header
;
90 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
92 struct tb_cfg_header header
;
99 ICM_GET_TOPOLOGY
= 0x1,
100 ICM_DRIVER_READY
= 0x3,
101 ICM_APPROVE_DEVICE
= 0x4,
102 ICM_CHALLENGE_DEVICE
= 0x5,
103 ICM_ADD_DEVICE_KEY
= 0x6,
105 ICM_APPROVE_XDOMAIN
= 0x10,
106 ICM_DISCONNECT_XDOMAIN
= 0x11,
107 ICM_PREBOOT_ACL
= 0x18,
110 enum icm_event_code
{
111 ICM_EVENT_DEVICE_CONNECTED
= 0x3,
112 ICM_EVENT_DEVICE_DISCONNECTED
= 0x4,
113 ICM_EVENT_XDOMAIN_CONNECTED
= 0x6,
114 ICM_EVENT_XDOMAIN_DISCONNECTED
= 0x7,
115 ICM_EVENT_RTD3_VETO
= 0xa,
118 struct icm_pkg_header
{
125 #define ICM_FLAGS_ERROR BIT(0)
126 #define ICM_FLAGS_NO_KEY BIT(1)
127 #define ICM_FLAGS_SLEVEL_SHIFT 3
128 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
129 #define ICM_FLAGS_DUAL_LANE BIT(5)
130 #define ICM_FLAGS_SPEED_GEN3 BIT(7)
131 #define ICM_FLAGS_WRITE BIT(7)
133 struct icm_pkg_driver_ready
{
134 struct icm_pkg_header hdr
;
137 /* Falcon Ridge only messages */
139 struct icm_fr_pkg_driver_ready_response
{
140 struct icm_pkg_header hdr
;
146 #define ICM_FR_SLEVEL_MASK 0xf
148 /* Falcon Ridge & Alpine Ridge common messages */
150 struct icm_fr_pkg_get_topology
{
151 struct icm_pkg_header hdr
;
154 #define ICM_GET_TOPOLOGY_PACKETS 14
156 struct icm_fr_pkg_get_topology_response
{
157 struct icm_pkg_header hdr
;
162 u8 drom_i2c_address_index
;
166 u32 port_hop_info
[16];
169 #define ICM_SWITCH_USED BIT(0)
170 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
171 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
173 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
174 #define ICM_PORT_INDEX_SHIFT 24
175 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
177 struct icm_fr_event_device_connected
{
178 struct icm_pkg_header hdr
;
186 #define ICM_LINK_INFO_LINK_MASK 0x7
187 #define ICM_LINK_INFO_DEPTH_SHIFT 4
188 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
189 #define ICM_LINK_INFO_APPROVED BIT(8)
190 #define ICM_LINK_INFO_REJECTED BIT(9)
191 #define ICM_LINK_INFO_BOOT BIT(10)
193 struct icm_fr_pkg_approve_device
{
194 struct icm_pkg_header hdr
;
201 struct icm_fr_event_device_disconnected
{
202 struct icm_pkg_header hdr
;
207 struct icm_fr_event_xdomain_connected
{
208 struct icm_pkg_header hdr
;
219 struct icm_fr_event_xdomain_disconnected
{
220 struct icm_pkg_header hdr
;
226 struct icm_fr_pkg_add_device_key
{
227 struct icm_pkg_header hdr
;
235 struct icm_fr_pkg_add_device_key_response
{
236 struct icm_pkg_header hdr
;
243 struct icm_fr_pkg_challenge_device
{
244 struct icm_pkg_header hdr
;
252 struct icm_fr_pkg_challenge_device_response
{
253 struct icm_pkg_header hdr
;
262 struct icm_fr_pkg_approve_xdomain
{
263 struct icm_pkg_header hdr
;
273 struct icm_fr_pkg_approve_xdomain_response
{
274 struct icm_pkg_header hdr
;
284 /* Alpine Ridge only messages */
286 struct icm_ar_pkg_driver_ready_response
{
287 struct icm_pkg_header hdr
;
293 #define ICM_AR_FLAGS_RTD3 BIT(6)
295 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
296 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
297 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
298 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
300 struct icm_ar_pkg_get_route
{
301 struct icm_pkg_header hdr
;
306 struct icm_ar_pkg_get_route_response
{
307 struct icm_pkg_header hdr
;
314 struct icm_ar_boot_acl_entry
{
319 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
321 struct icm_ar_pkg_preboot_acl
{
322 struct icm_pkg_header hdr
;
323 struct icm_ar_boot_acl_entry acl
[ICM_AR_PREBOOT_ACL_ENTRIES
];
326 struct icm_ar_pkg_preboot_acl_response
{
327 struct icm_pkg_header hdr
;
328 struct icm_ar_boot_acl_entry acl
[ICM_AR_PREBOOT_ACL_ENTRIES
];
331 /* Titan Ridge messages */
333 struct icm_tr_pkg_driver_ready_response
{
334 struct icm_pkg_header hdr
;
342 #define ICM_TR_FLAGS_RTD3 BIT(6)
344 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
345 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7
346 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
348 struct icm_tr_event_device_connected
{
349 struct icm_pkg_header hdr
;
359 struct icm_tr_event_device_disconnected
{
360 struct icm_pkg_header hdr
;
365 struct icm_tr_event_xdomain_connected
{
366 struct icm_pkg_header hdr
;
377 struct icm_tr_event_xdomain_disconnected
{
378 struct icm_pkg_header hdr
;
384 struct icm_tr_pkg_approve_device
{
385 struct icm_pkg_header hdr
;
393 struct icm_tr_pkg_add_device_key
{
394 struct icm_pkg_header hdr
;
403 struct icm_tr_pkg_challenge_device
{
404 struct icm_pkg_header hdr
;
413 struct icm_tr_pkg_approve_xdomain
{
414 struct icm_pkg_header hdr
;
424 struct icm_tr_pkg_disconnect_xdomain
{
425 struct icm_pkg_header hdr
;
433 struct icm_tr_pkg_challenge_device_response
{
434 struct icm_pkg_header hdr
;
444 struct icm_tr_pkg_add_device_key_response
{
445 struct icm_pkg_header hdr
;
453 struct icm_tr_pkg_approve_xdomain_response
{
454 struct icm_pkg_header hdr
;
464 struct icm_tr_pkg_disconnect_xdomain_response
{
465 struct icm_pkg_header hdr
;
473 /* Ice Lake messages */
475 struct icm_icl_event_rtd3_veto
{
476 struct icm_pkg_header hdr
;
480 /* XDomain messages */
482 struct tb_xdomain_header
{
488 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
489 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
490 #define TB_XDOMAIN_SN_SHIFT 27
493 UUID_REQUEST_OLD
= 1,
497 PROPERTIES_CHANGED_REQUEST
,
498 PROPERTIES_CHANGED_RESPONSE
,
503 struct tb_xdp_header
{
504 struct tb_xdomain_header xd_hdr
;
510 struct tb_xdp_header hdr
;
513 struct tb_xdp_uuid_response
{
514 struct tb_xdp_header hdr
;
520 struct tb_xdp_properties
{
521 struct tb_xdp_header hdr
;
528 struct tb_xdp_properties_response
{
529 struct tb_xdp_header hdr
;
539 * Max length of data array single XDomain property response is allowed
542 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
543 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
545 /* Maximum size of the total property block in dwords we allow */
546 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
548 struct tb_xdp_properties_changed
{
549 struct tb_xdp_header hdr
;
553 struct tb_xdp_properties_changed_response
{
554 struct tb_xdp_header hdr
;
559 ERROR_UNKNOWN_PACKET
,
560 ERROR_UNKNOWN_DOMAIN
,
565 struct tb_xdp_error_response
{
566 struct tb_xdp_header hdr
;