1 MediaTek PCIESYS controller
2 ============================
4 The MediaTek PCIESYS controller provides various clocks to the system.
8 - compatible: Should be:
9 - "mediatek,mt7622-pciesys", "syscon"
10 - "mediatek,mt7629-pciesys", "syscon"
11 - #clock-cells: Must be 1
12 - #reset-cells: Must be 1
14 The PCIESYS controller uses the common clk binding from
15 Documentation/devicetree/bindings/clock/clock-bindings.txt
16 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
20 pciesys: pciesys@1a100800 {
21 compatible = "mediatek,mt7622-pciesys", "syscon";
22 reg = <0 0x1a100800 0 0x1000>;