Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt

   1 Renesas Gen3 DWC HDMI TX Encoder
   2 ================================
   3
   4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
   5 with a companion PHY IP.
   6
   7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
   8 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
   9 following device-specific properties.
  10
  11
  12 Required properties:
  13
  14 - compatible : Shall contain one or more of
  15   - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
  16   - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX
  17   - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
  18   - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
  19   - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
  20   - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 and RZ/G2 compatible
  21                              HDMI TX
  22
  23     When compatible with generic versions, nodes must list the SoC-specific
  24     version corresponding to the platform first, followed by the
  25     family-specific version.
  26
  27 - reg: See dw_hdmi.txt.
  28 - interrupts: HDMI interrupt number
  29 - clocks: See dw_hdmi.txt.
  30 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
  31 - ports: See dw_hdmi.txt. The DWC HDMI shall have one port numbered 0
  32   corresponding to the video input of the controller and one port numbered 1
  33   corresponding to its HDMI output, and one port numbered 2 corresponding to
  34   sound input of the controller. Each port shall have a single endpoint.
  35
  36 Optional properties:
  37
  38 - power-domains: Shall reference the power domain that contains the DWC HDMI,
  39   if any.
  40
  41
  42 Example:
  43
  44         hdmi0: hdmi@fead0000 {
  45                 compatible = "renesas,r8a7795-dw-hdmi";
  46                 reg = <0 0xfead0000 0 0x10000>;
  47                 interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
  48                 clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
  49                 clock-names = "iahb", "isfr";
  50                 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
  51
  52                 ports {
  53                         #address-cells = <1>;
  54                         #size-cells = <0>;
  55                         port@0 {
  56                                 reg = <0>;
  57                                 dw_hdmi0_in: endpoint {
  58                                         remote-endpoint = <&du_out_hdmi0>;
  59                                 };
  60                         };
  61                         port@1 {
  62                                 reg = <1>;
  63                                 rcar_dw_hdmi0_out: endpoint {
  64                                         remote-endpoint = <&hdmi0_con>;
  65                                 };
  66                         };
  67                         port@2 {
  68                                 reg = <2>;
  69                                 rcar_dw_hdmi0_sound_in: endpoint {
  70                                         remote-endpoint = <&hdmi_sound_out>;
  71                                 };
  72                         };
  73                 };
  74         };
  75
  76         hdmi0-out {
  77                 compatible = "hdmi-connector";
  78                 label = "HDMI0 OUT";
  79                 type = "a";
  80
  81                 port {
  82                         hdmi0_con: endpoint {
  83                                 remote-endpoint = <&rcar_dw_hdmi0_out>;
  84                         };
  85                 };
  86         };