1 Rockchip specific extensions for rk3066 HDMI
2 ============================================
6 "rockchip,rk3066-hdmi";
8 Physical base address and length of the controller's registers.
10 Phandle to HDMI controller clock, name should be "hclk".
12 HDMI interrupt number.
14 Phandle to the RK3066_PD_VIO power domain.
16 This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
18 Contains one port node with two endpoints, numbered 0 and 1,
19 connected respectively to vop0 and vop1.
20 Contains one port node with one endpoint
21 connected to a hdmi-connector node.
22 - pinctrl-0, pinctrl-name:
23 Switch the iomux for the HPD/I2C pins to HDMI function.
27 compatible = "rockchip,rk3066-hdmi";
28 reg = <0x10116000 0x2000>;
29 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
30 clocks = <&cru HCLK_HDMI>;
32 power-domains = <&power RK3066_PD_VIO>;
33 rockchip,grf = <&grf>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
44 hdmi_in_vop0: endpoint@0 {
46 remote-endpoint = <&vop0_out_hdmi>;
48 hdmi_in_vop1: endpoint@1 {
50 remote-endpoint = <&vop1_out_hdmi>;
55 hdmi_out_con: endpoint {
56 remote-endpoint = <&hdmi_con_in>;
65 rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
67 hdmii2c_xfer: hdmii2c-xfer {
68 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
69 <0 RK_PA2 1 &pcfg_pull_none>;