Documentation/devicetree/bindings/net/dsa/mt7530.txt

   1 Mediatek MT7530 Ethernet switch
   2 ================================
   3
   4 Required properties:
   5
   6 - compatible: may be compatible = "mediatek,mt7530"
   7         or compatible = "mediatek,mt7621"
   8 - #address-cells: Must be 1.
   9 - #size-cells: Must be 0.
  10 - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part
  11         on multi-chip module belong to MT7623A has or the remotely standalone
  12         chip as the function MT7623N reference board provided for.
  13
  14 If compatible mediatek,mt7530 is set then the following properties are required
  15
  16 - core-supply: Phandle to the regulator node necessary for the core power.
  17 - io-supply: Phandle to the regulator node necessary for the I/O power.
  18         See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt
  19         for details for the regulator setup on these boards.
  20
  21 If the property mediatek,mcm isn't defined, following property is required
  22
  23 - reset-gpios: Should be a gpio specifier for a reset line.
  24
  25 Else, following properties are required
  26
  27 - resets : Phandle pointing to the system reset controller with
  28         line index for the ethsys.
  29 - reset-names : Should be set to "mcm".
  30
  31 Required properties for the child nodes within ports container:
  32
  33 - reg: Port address described must be 6 for CPU port and from 0 to 5 for
  34         user ports.
  35 - phy-mode: String, must be either "trgmii" or "rgmii" for port labeled
  36          "cpu".
  37
  38 Port 5 of the switch is muxed between:
  39 1. GMAC5: GMAC5 can interface with another external MAC or PHY.
  40 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
  41    of the SOC. Used in many setups where port 0/4 becomes the WAN port.
  42    Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to
  43          GMAC5 when the gpios for RGMII2 (GPIO 22-33) are not used and not
  44          connected to external component!
  45
  46 Port 5 modes/configurations:
  47 1. Port 5 is disabled and isolated: An external phy can interface to the 2nd
  48    GMAC of the SOC.
  49    In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd
  50    GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC!
  51 2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC.
  52    It is a simple MAC to PHY interface, port 5 needs to be setup for xMII mode
  53    and RGMII delay.
  54 3. Port 5 is muxed to GMAC5 and can interface to an external phy.
  55    Port 5 becomes an extra switch port.
  56    Only works on platform where external phy TX<->RX lines are swapped.
  57    Like in the Ubiquiti ER-X-SFP.
  58 4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU port.
  59    Currently a 2nd CPU port is not supported by DSA code.
  60
  61 Depending on how the external PHY is wired:
  62 1. normal: The PHY can only connect to 2nd GMAC but not to the switch
  63 2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as
  64    a ethernet port. But can't interface to the 2nd GMAC.
  65
  66 Based on the DT the port 5 mode is configured.
  67
  68 Driver tries to lookup the phy-handle of the 2nd GMAC of the master device.
  69 When phy-handle matches PHY of port 0 or 4 then port 5 set-up as mode 2.
  70 phy-mode must be set, see also example 2 below!
  71  * mt7621: phy-mode = "rgmii-txid";
  72  * mt7623: phy-mode = "rgmii";
  73
  74 See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional
  75 required, optional properties and how the integrated switch subnodes must
  76 be specified.
  77
  78 Example:
  79
  80         &mdio0 {
  81                 switch@0 {
  82                         compatible = "mediatek,mt7530";
  83                         #address-cells = <1>;
  84                         #size-cells = <0>;
  85                         reg = <0>;
  86
  87                         core-supply = <&mt6323_vpa_reg>;
  88                         io-supply = <&mt6323_vemc3v3_reg>;
  89                         reset-gpios = <&pio 33 0>;
  90
  91                         ports {
  92                                 #address-cells = <1>;
  93                                 #size-cells = <0>;
  94                                 reg = <0>;
  95                                 port@0 {
  96                                         reg = <0>;
  97                                         label = "lan0";
  98                                 };
  99
 100                                 port@1 {
 101                                         reg = <1>;
 102                                         label = "lan1";
 103                                 };
 104
 105                                 port@2 {
 106                                         reg = <2>;
 107                                         label = "lan2";
 108                                 };
 109
 110                                 port@3 {
 111                                         reg = <3>;
 112                                         label = "lan3";
 113                                 };
 114
 115                                 port@4 {
 116                                         reg = <4>;
 117                                         label = "wan";
 118                                 };
 119
 120                                 port@6 {
 121                                         reg = <6>;
 122                                         label = "cpu";
 123                                         ethernet = <&gmac0>;
 124                                         phy-mode = "trgmii";
 125                                         fixed-link {
 126                                                 speed = <1000>;
 127                                                 full-duplex;
 128                                         };
 129                                 };
 130                         };
 131                 };
 132         };
 133
 134 Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4.
 135
 136 &eth {
 137         gmac0: mac@0 {
 138                 compatible = "mediatek,eth-mac";
 139                 reg = <0>;
 140                 phy-mode = "rgmii";
 141
 142                 fixed-link {
 143                         speed = <1000>;
 144                         full-duplex;
 145                         pause;
 146                 };
 147         };
 148
 149         gmac1: mac@1 {
 150                 compatible = "mediatek,eth-mac";
 151                 reg = <1>;
 152                 phy-mode = "rgmii-txid";
 153                 phy-handle = <&phy4>;
 154         };
 155
 156         mdio: mdio-bus {
 157                 #address-cells = <1>;
 158                 #size-cells = <0>;
 159
 160                 /* Internal phy */
 161                 phy4: ethernet-phy@4 {
 162                         reg = <4>;
 163                 };
 164
 165                 mt7530: switch@1f {
 166                         compatible = "mediatek,mt7621";
 167                         #address-cells = <1>;
 168                         #size-cells = <0>;
 169                         reg = <0x1f>;
 170                         pinctrl-names = "default";
 171                         mediatek,mcm;
 172
 173                         resets = <&rstctrl 2>;
 174                         reset-names = "mcm";
 175
 176                         ports {
 177                                 #address-cells = <1>;
 178                                 #size-cells = <0>;
 179
 180                                 port@0 {
 181                                         reg = <0>;
 182                                         label = "lan0";
 183                                 };
 184
 185                                 port@1 {
 186                                         reg = <1>;
 187                                         label = "lan1";
 188                                 };
 189
 190                                 port@2 {
 191                                         reg = <2>;
 192                                         label = "lan2";
 193                                 };
 194
 195                                 port@3 {
 196                                         reg = <3>;
 197                                         label = "lan3";
 198                                 };
 199
 200 /* Commented out. Port 4 is handled by 2nd GMAC.
 201                                 port@4 {
 202                                         reg = <4>;
 203                                         label = "lan4";
 204                                 };
 205 */
 206
 207                                 cpu_port0: port@6 {
 208                                         reg = <6>;
 209                                         label = "cpu";
 210                                         ethernet = <&gmac0>;
 211                                         phy-mode = "rgmii";
 212
 213                                         fixed-link {
 214                                                 speed = <1000>;
 215                                                 full-duplex;
 216                                                 pause;
 217                                         };
 218                                 };
 219                         };
 220                 };
 221         };
 222 };
 223
 224 Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY.
 225
 226 &eth {
 227         gmac0: mac@0 {
 228                 compatible = "mediatek,eth-mac";
 229                 reg = <0>;
 230                 phy-mode = "rgmii";
 231
 232                 fixed-link {
 233                         speed = <1000>;
 234                         full-duplex;
 235                         pause;
 236                 };
 237         };
 238
 239         mdio: mdio-bus {
 240                 #address-cells = <1>;
 241                 #size-cells = <0>;
 242
 243                 /* External phy */
 244                 ephy5: ethernet-phy@7 {
 245                         reg = <7>;
 246                 };
 247
 248                 mt7530: switch@1f {
 249                         compatible = "mediatek,mt7621";
 250                         #address-cells = <1>;
 251                         #size-cells = <0>;
 252                         reg = <0x1f>;
 253                         pinctrl-names = "default";
 254                         mediatek,mcm;
 255
 256                         resets = <&rstctrl 2>;
 257                         reset-names = "mcm";
 258
 259                         ports {
 260                                 #address-cells = <1>;
 261                                 #size-cells = <0>;
 262
 263                                 port@0 {
 264                                         reg = <0>;
 265                                         label = "lan0";
 266                                 };
 267
 268                                 port@1 {
 269                                         reg = <1>;
 270                                         label = "lan1";
 271                                 };
 272
 273                                 port@2 {
 274                                         reg = <2>;
 275                                         label = "lan2";
 276                                 };
 277
 278                                 port@3 {
 279                                         reg = <3>;
 280                                         label = "lan3";
 281                                 };
 282
 283                                 port@4 {
 284                                         reg = <4>;
 285                                         label = "lan4";
 286                                 };
 287
 288                                 port@5 {
 289                                         reg = <5>;
 290                                         label = "lan5";
 291                                         phy-mode = "rgmii";
 292                                         phy-handle = <&ephy5>;
 293                                 };
 294
 295                                 cpu_port0: port@6 {
 296                                         reg = <6>;
 297                                         label = "cpu";
 298                                         ethernet = <&gmac0>;
 299                                         phy-mode = "rgmii";
 300
 301                                         fixed-link {
 302                                                 speed = <1000>;
 303                                                 full-duplex;
 304                                                 pause;
 305                                         };
 306                                 };
 307                         };
 308                 };
 309         };
 310 };