1 * Socionext NetSec Ethernet Controller IP
4 - compatible: Should be "socionext,synquacer-netsec"
5 - reg: Address and length of the control register area, followed by the
6 address and length of the EEPROM holding the MAC address and
8 - interrupts: Should contain ethernet controller interrupt
9 - clocks: phandle to the PHY reference clock
10 - clock-names: Should be "phy_ref_clk"
11 - phy-mode: See ethernet.txt file in the same directory
12 - phy-handle: See ethernet.txt in the same directory.
14 - mdio device tree subnode: When the Netsec has a phy connected to its local
15 mdio, there must be device tree subnode with the following
18 - #address-cells: Must be <1>.
19 - #size-cells: Must be <0>.
21 For each phy on the mdio bus, there must be a node with the following
23 - compatible: Refer to phy.txt
24 - reg: phy id used to communicate to phy.
26 Optional properties: (See ethernet.txt file in the same directory)
27 - dma-coherent: Boolean property, must only be present if memory
28 accesses performed by the device are cache coherent.
29 - max-speed: See ethernet.txt in the same directory.
30 - max-frame-size: See ethernet.txt in the same directory.
32 The MAC address will be determined using the optional properties
33 defined in ethernet.txt.
36 eth0: ethernet@522d0000 {
37 compatible = "socionext,synquacer-netsec";
38 reg = <0 0x522d0000 0x0 0x10000>, <0 0x10000000 0x0 0x10000>;
39 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
40 clocks = <&clk_netsec>;
41 clock-names = "phy_ref_clk";
44 max-frame-size = <9000>;
50 phy1: ethernet-phy@1 {
51 compatible = "ethernet-phy-ieee802.3-c22";