1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 USB PHY Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
19 - allwinner,sun4i-a10-usb-phy
20 - allwinner,sun7i-a20-usb-phy
24 - description: PHY Control registers
25 - description: PHY PMU1 registers
26 - description: PHY PMU2 registers
36 description: USB PHY bus clock
43 - description: USB OTG reset
44 - description: USB Host 1 Controller reset
45 - description: USB Host 2 Controller reset
54 description: GPIO to the USB OTG ID pin
57 description: GPIO to the USB OTG VBUS detect pin
59 usb0_vbus_power-supply:
60 description: Power supply to detect the USB OTG VBUS
63 description: Regulator controlling USB OTG VBUS
66 description: Regulator controlling USB1 Host controller
69 description: Regulator controlling USB2 Host controller
81 additionalProperties: false
85 #include <dt-bindings/gpio/gpio.h>
86 #include <dt-bindings/clock/sun4i-a10-ccu.h>
87 #include <dt-bindings/reset/sun4i-a10-ccu.h>
89 usbphy: phy@01c13400 {
91 compatible = "allwinner,sun4i-a10-usb-phy";
92 reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
93 reg-names = "phy_ctrl", "pmu1", "pmu2";
94 clocks = <&ccu CLK_USB_PHY>;
95 clock-names = "usb_phy";
96 resets = <&ccu RST_USB_PHY0>,
99 reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
100 usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>;
101 usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>;
102 usb0_vbus-supply = <®_usb0_vbus>;
103 usb1_vbus-supply = <®_usb1_vbus>;
104 usb2_vbus-supply = <®_usb2_vbus>;