1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Pin Controller Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 GPIO consumers must use three arguments, first the number of the
18 bank, then the pin number inside that bank, and finally the GPIO
24 Interrupts consumers must use three arguments, first the number
25 of the bank, then the pin number inside that bank, and finally
30 - allwinner,sun4i-a10-pinctrl
31 - allwinner,sun5i-a10s-pinctrl
32 - allwinner,sun5i-a13-pinctrl
33 - allwinner,sun6i-a31-pinctrl
34 - allwinner,sun6i-a31-r-pinctrl
35 - allwinner,sun6i-a31s-pinctrl
36 - allwinner,sun7i-a20-pinctrl
37 - allwinner,sun8i-a23-pinctrl
38 - allwinner,sun8i-a23-r-pinctrl
39 - allwinner,sun8i-a33-pinctrl
40 - allwinner,sun8i-a83t-pinctrl
41 - allwinner,sun8i-a83t-r-pinctrl
42 - allwinner,sun8i-h3-pinctrl
43 - allwinner,sun8i-h3-r-pinctrl
44 - allwinner,sun8i-r40-pinctrl
45 - allwinner,sun8i-v3-pinctrl
46 - allwinner,sun8i-v3s-pinctrl
47 - allwinner,sun9i-a80-pinctrl
48 - allwinner,sun9i-a80-r-pinctrl
49 - allwinner,sun50i-a64-pinctrl
50 - allwinner,sun50i-a64-r-pinctrl
51 - allwinner,sun50i-h5-pinctrl
52 - allwinner,sun50i-h6-pinctrl
53 - allwinner,sun50i-h6-r-pinctrl
54 - allwinner,suniv-f1c100s-pinctrl
55 - nextthing,gr8-pinctrl
64 One interrupt per external interrupt bank supported on the
65 controller, sorted by bank number ascending order.
69 - description: Bus Clock
70 - description: High Frequency Oscillator
71 - description: Low Frequency Oscillator
83 interrupt-controller: true
88 - $ref: /schemas/types.yaml#/definitions/uint32-array
92 Debouncing periods in microseconds, one period per interrupt
93 bank found in the controller
96 # It's pretty scary, but the basic idea is that:
97 # - One node name can start with either s- or r- for PRCM nodes,
98 # - Then, the name itself can be any repetition of <string>- (to
99 # accomodate with nodes like uart4-rts-cts-pins), where each
100 # string can be either starting with 'p' but in a string longer
101 # than 3, or something that doesn't start with 'p',
102 # - Then, the bank name is optional and will be between pa and pg,
103 # pl or pm. Some pins groups that have several options will have
104 # the pin numbers then,
105 # - Finally, the name will end with either -pin or pins.
107 "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$":
119 - $ref: /schemas/types.yaml#/definitions/uint32
120 - enum: [ 10, 20, 30, 40 ]
126 additionalProperties: false
128 "^vcc-p[a-hlm]-supply$":
130 Power supplies for pin banks.
141 - interrupt-controller
144 # FIXME: We should have the pin bank supplies here, but not a lot of
145 # boards are defining it at the moment so it would generate a lot of
152 - allwinner,sun9i-a80-pinctrl
165 - allwinner,sun6i-a31-pinctrl
166 - allwinner,sun6i-a31s-pinctrl
167 - allwinner,sun50i-h6-pinctrl
180 - allwinner,sun8i-a23-pinctrl
181 - allwinner,sun8i-a83t-pinctrl
182 - allwinner,sun50i-a64-pinctrl
183 - allwinner,sun50i-h5-pinctrl
184 - allwinner,suniv-f1c100s-pinctrl
197 - allwinner,sun6i-a31-r-pinctrl
198 - allwinner,sun8i-a33-pinctrl
199 - allwinner,sun8i-h3-pinctrl
200 - allwinner,sun8i-v3-pinctrl
201 - allwinner,sun8i-v3s-pinctrl
202 - allwinner,sun9i-a80-r-pinctrl
203 - allwinner,sun50i-h6-r-pinctrl
217 additionalProperties: false
221 #include <dt-bindings/clock/sun5i-ccu.h>
223 pio: pinctrl@1c20800 {
224 compatible = "allwinner,sun5i-a13-pinctrl";
225 reg = <0x01c20800 0x400>;
227 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
228 clock-names = "apb", "hosc", "losc";
230 interrupt-controller;
231 #interrupt-cells = <3>;
234 uart1_pe_pins: uart1-pe-pins {
235 pins = "PE10", "PE11";
239 uart1_pg_pins: uart1-pg-pins {