1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
31 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
32 if the device is on an spmi bus or an ssbi bus respectively
36 Value type: <prop-encoded-array>
37 Definition: Register base of the GPIO block and length.
41 Value type: <prop-encoded-array>
42 Definition: Must contain an array of encoded interrupt specifiers for
48 Definition: Mark the device node as a GPIO controller
53 Definition: Must be 2;
54 the first cell will be used to define gpio number and the
55 second denotes the flags for this gpio
57 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
58 a general description of GPIO and interrupt bindings.
60 Please refer to pinctrl-bindings.txt in this directory for details of the
61 common pinctrl bindings used by client devices, including the meaning of the
62 phrase "pin configuration node".
64 The pin configuration nodes act as a container for an arbitrary number of
65 subnodes. Each of these subnodes represents some desired configuration for a
66 pin or a list of pins. This configuration can include the
67 mux function to select on those pin(s), and various pin configuration
68 parameters, as listed below.
73 The name of each subnode is not important; all subnodes should be enumerated
74 and processed purely based on their content.
76 Each subnode only affects those parameters that are explicitly listed. In
77 other words, a subnode that lists a mux function but no pin configuration
78 parameters implies no information about any pin configuration parameters.
79 Similarly, a pin subnode that describes a pullup parameter implies no
80 information about e.g. the mux function.
82 The following generic properties as defined in pinctrl-bindings.txt are valid
83 to specify in a pin configuration subnode:
87 Value type: <string-array>
88 Definition: List of gpio pins affected by the properties specified in
89 this subnode. Valid pins are:
90 gpio1-gpio4 for pm8005
91 gpio1-gpio6 for pm8018
92 gpio1-gpio12 for pm8038
93 gpio1-gpio40 for pm8058
94 gpio1-gpio4 for pm8916
95 gpio1-gpio38 for pm8917
96 gpio1-gpio44 for pm8921
97 gpio1-gpio36 for pm8941
98 gpio1-gpio8 for pm8950 (hole on gpio3)
99 gpio1-gpio22 for pm8994
100 gpio1-gpio26 for pm8998
101 gpio1-gpio22 for pma8084
102 gpio1-gpio2 for pmi8950
103 gpio1-gpio10 for pmi8994
104 gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10)
105 gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7
107 gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
108 gpio1-gpio12 for pm8150l (hole on gpio7)
109 gpio1-gpio10 for pm6150
110 gpio1-gpio12 for pm6150l
115 Definition: Specify the alternative function to be configured for the
116 specified pins. Valid values are:
125 And following values are supported by LV/MV GPIO subtypes:
132 Definition: The specified pins should be configured as no pull.
137 Definition: The specified pins should be configured as pull down.
142 Definition: The specified pins should be configured as pull up.
144 - qcom,pull-up-strength:
147 Definition: Specifies the strength to use for pull up, if selected.
148 Valid values are; as defined in
149 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
150 1: 30uA (PMIC_GPIO_PULL_UP_30)
151 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
152 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
153 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
154 If this property is omitted 30uA strength will be used if
157 - bias-high-impedance:
160 Definition: The specified pins will put in high-Z mode and disabled.
165 Definition: The specified pins are put in input mode.
170 Definition: The specified pins are configured in output mode, driven
176 Definition: The specified pins are configured in output mode, driven
182 Definition: Selects the power source for the specified pins. Valid
183 power sources are defined per chip in
184 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
186 - qcom,drive-strength:
189 Definition: Selects the drive strength for the specified pins. Value
191 0: no (PMIC_GPIO_STRENGTH_NO)
192 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
193 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
194 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
195 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
200 Definition: The specified pins are configured in push-pull mode.
205 Definition: The specified pins are configured in open-drain mode.
210 Definition: The specified pins are configured in open-source mode.
215 Definition: The specified pins are configured in analog-pass-through mode.
220 Definition: Selects ATEST rail to route to GPIO when it's configured
221 in analog-pass-through mode.
222 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
227 Definition: Selects DTEST rail to route to GPIO when it's configured
229 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
233 pm8921_gpio: gpio@150 {
234 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
236 interrupts = <192 1>, <193 1>, <194 1>,
237 <195 1>, <196 1>, <197 1>,
238 <198 1>, <199 1>, <200 1>,
239 <201 1>, <202 1>, <203 1>,
240 <204 1>, <205 1>, <206 1>,
241 <207 1>, <208 1>, <209 1>,
242 <210 1>, <211 1>, <212 1>,
243 <213 1>, <214 1>, <215 1>,
244 <216 1>, <217 1>, <218 1>,
245 <219 1>, <220 1>, <221 1>,
246 <222 1>, <223 1>, <224 1>,
247 <225 1>, <226 1>, <227 1>,
248 <228 1>, <229 1>, <230 1>,
249 <231 1>, <232 1>, <233 1>,
255 pm8921_gpio_keys: gpio-keys {
257 pins = "gpio20", "gpio21";
263 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
264 power-source = <PM8921_GPIO_S4>;