1 Freescale i.MX TPM PWM controller
4 - compatible : Should be "fsl,imx7ulp-pwm".
5 - reg: Physical base address and length of the controller's registers.
6 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of the cells format.
7 - clocks : The clock provided by the SoC to drive the PWM.
8 - interrupts: The interrupt for the PWM controller.
10 Note: The TPM counter and period counter are shared between multiple channels, so all channels
11 should use same period setting.
16 compatible = "fsl,imx7ulp-pwm";
17 reg = <0x40250000 0x1000>;
18 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
19 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
20 clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;