1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/serial/pl011.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM AMBA Primecell PL011 serial UART
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/serial.yaml#
15 # Need a custom select here or 'arm,primecell' will match on lots of nodes
31 - const: arm,primecell
33 - const: zte,zx296702-uart
34 - const: arm,primecell
47 When present, must have one state named "default",
48 and may contain a second name named "sleep". The former
49 state sets up pins for ordinary operation whereas
50 the latter state will put the associated pins to sleep
51 when the UART is unused
59 When present, the first clock listed must correspond to
60 the clock named UARTCLK on the IP block, i.e. the clock
61 to the external serial line, whereas the second clock
62 must correspond to the PCLK clocking the internal logic
63 of the block. Just listing one clock (the first one) is
84 Enables polling when using RX DMA.
89 Rate at which poll occurs when auto-poll is set.
92 - $ref: /schemas/types.yaml#/definitions/uint32
97 Poll timeout when auto-poll is set, default
100 - $ref: /schemas/types.yaml#/definitions/uint32
109 poll-rate-ms: [ auto-poll ]
110 poll-timeout-ms: [ auto-poll ]
112 additionalProperties: false
117 compatible = "arm,pl011", "arm,primecell";
118 reg = <0x80120000 0x1000>;
119 interrupts = <0 11 4>;
120 dmas = <&dma 13 0 0x2>, <&dma 13 0 0x0>;
121 dma-names = "rx", "tx";
122 clocks = <&foo_clk>, <&bar_clk>;
123 clock-names = "uartclk", "apb_pclk";