3 The core can be generated with transmit (playback), only receive
4 (capture) or both directions enabled.
7 - compatible : Must be "adi,axi-i2s-1.00.a"
8 - reg : Must contain I2S core's registers location and length
9 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
10 The controller expects two clocks, the clock used for the AXI interface and
11 the clock used as the sampling rate reference clock sample.
12 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
14 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
15 the core. The core expects two dma channels if both transmit and receive are
16 enabled, one channel otherwise.
17 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
19 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
22 * clock/clock-bindings.txt
28 compatible = "adi,axi-i2s-1.00.a";
29 reg = <0x77600000 0x1000>;
30 clocks = <&clk 15>, <&audio_clock>;
31 clock-names = "axi", "ref";
32 dmas = <&ps7_dma 0>, <&ps7_dma 1>;
33 dma-names = "tx", "rx";