treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / Documentation / devicetree / bindings / thermal / qcom-tsens.yaml
blobeef13b9446a8764e268e85aa6a65e8a91f6c1c3d
1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 # Copyright 2019 Linaro Ltd.
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: QCOM SoC Temperature Sensor (TSENS)
10 maintainers:
11   - Amit Kucheria <amit.kucheria@linaro.org>
13 description: |
14   QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15   three distinct major versions of the IP that is supported by a single driver.
16   The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17   everything before v1 when there was no versioning information.
19 properties:
20   compatible:
21     oneOf:
22       - description: v0.1 of TSENS
23         items:
24           - enum:
25               - qcom,msm8916-tsens
26               - qcom,msm8974-tsens
27           - const: qcom,tsens-v0_1
29       - description: v1 of TSENS
30         items:
31           - enum:
32               - qcom,msm8976-tsens
33               - qcom,qcs404-tsens
34           - const: qcom,tsens-v1
36       - description: v2 of TSENS
37         items:
38           - enum:
39               - qcom,msm8996-tsens
40               - qcom,msm8998-tsens
41               - qcom,sdm845-tsens
42           - const: qcom,tsens-v2
44   reg:
45     maxItems: 2
46     items:
47       - description: TM registers
48       - description: SROT registers
50   nvmem-cells:
51     minItems: 1
52     maxItems: 2
53     description:
54       Reference to an nvmem node for the calibration data
56   nvmem-cells-names:
57     minItems: 1
58     maxItems: 2
59     items:
60       - enum:
61         - caldata
62         - calsel
64   "#qcom,sensors":
65     allOf:
66       - $ref: /schemas/types.yaml#/definitions/uint32
67       - minimum: 1
68       - maximum: 16
69     description:
70       Number of sensors enabled on this platform
72   "#thermal-sensor-cells":
73     const: 1
74     description:
75       Number of cells required to uniquely identify the thermal sensors. Since
76       we have multiple sensors this is set to 1
78 allOf:
79   - if:
80       properties:
81         compatible:
82           contains:
83             enum:
84               - qcom,msm8916-tsens
85               - qcom,msm8974-tsens
86               - qcom,msm8976-tsens
87               - qcom,qcs404-tsens
88               - qcom,tsens-v0_1
89               - qcom,tsens-v1
90     then:
91       properties:
92         interrupts:
93           items:
94             - description: Combined interrupt if upper or lower threshold crossed
95         interrupt-names:
96           items:
97             - const: uplow
99     else:
100       properties:
101         interrupts:
102           items:
103             - description: Combined interrupt if upper or lower threshold crossed
104             - description: Interrupt if critical threshold crossed
105         interrupt-names:
106           items:
107             - const: uplow
108             - const: critical
110 required:
111   - compatible
112   - reg
113   - "#qcom,sensors"
114   - interrupts
115   - interrupt-names
116   - "#thermal-sensor-cells"
118 examples:
119   - |
120     #include <dt-bindings/interrupt-controller/arm-gic.h>
121     // Example 1 (legacy: for pre v1 IP):
122     tsens1: thermal-sensor@900000 {
123            compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
124            reg = <0x4a9000 0x1000>, /* TM */
125                  <0x4a8000 0x1000>; /* SROT */
127            nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
128            nvmem-cell-names = "caldata", "calsel";
130            interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
131            interrupt-names = "uplow";
133            #qcom,sensors = <5>;
134            #thermal-sensor-cells = <1>;
135     };
137   - |
138     #include <dt-bindings/interrupt-controller/arm-gic.h>
139     // Example 2 (for any platform containing v1 of the TSENS IP):
140     tsens2: thermal-sensor@4a9000 {
141           compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
142           reg = <0x004a9000 0x1000>, /* TM */
143                 <0x004a8000 0x1000>; /* SROT */
145           nvmem-cells = <&tsens_caldata>;
146           nvmem-cell-names = "calib";
148           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
149           interrupt-names = "uplow";
151           #qcom,sensors = <10>;
152           #thermal-sensor-cells = <1>;
153     };
155   - |
156     #include <dt-bindings/interrupt-controller/arm-gic.h>
157     // Example 3 (for any platform containing v2 of the TSENS IP):
158     tsens3: thermal-sensor@c263000 {
159            compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
160            reg = <0xc263000 0x1ff>,
161                  <0xc222000 0x1ff>;
163            interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
164                         <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
165            interrupt-names = "uplow", "critical";
167            #qcom,sensors = <13>;
168            #thermal-sensor-cells = <1>;
169     };