1 * Freescale i.MX7ULP Watchdog Timer (WDT) Controller
4 - compatible : Should be "fsl,imx7ulp-wdt"
5 - reg : Should contain WDT registers location and length
6 - interrupts : Should contain WDT interrupt
7 - clocks: Should contain a phandle pointing to the gated peripheral clock.
10 - timeout-sec : Contains the watchdog timeout in seconds
14 wdog1: watchdog@403d0000 {
15 compatible = "fsl,imx7ulp-wdt";
16 reg = <0x403d0000 0x10000>;
17 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
18 clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
19 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
20 assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;