5 This document describes the i2c protocol. Or will, when it is finished :-)
10 =============== =============================================================
13 Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
14 A, NA (1 bit) : Accept and reverse accept bit.
15 Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
16 get a 10 bit I2C address.
17 Comm (8 bits): Command byte, a data byte which often selects a register on
19 Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
21 Count (8 bits): A data byte containing the length of a block operation.
23 [..]: Data sent by I2C device, as opposed to data sent by the
25 =============== =============================================================
28 Simple send transaction
29 =======================
31 This corresponds to i2c_master_send::
33 S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
36 Simple receive transaction
37 ==========================
39 This corresponds to i2c_master_recv::
41 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
47 This corresponds to i2c_transfer
49 They are just like the above transactions, but instead of a stop bit P
50 a start bit S is sent and the transaction continues. An example of
51 a byte read, followed by a byte write::
53 S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
59 The following modifications to the I2C protocol can also be generated by
60 setting these flags for i2c messages. With the exception of I2C_M_NOSTART, they
61 are usually only needed to work around device issues:
64 Normally message is interrupted immediately if there is [NA] from the
65 client. Setting this flag treats any [NA] as [A], and all of
67 These messages may still fail to SCL lo->hi timeout.
70 In a read message, master A/NA bit is skipped.
73 In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
74 point. For example, setting I2C_M_NOSTART on the second partial message
75 generates something like::
77 S Addr Rd [A] [Data] NA Data [A] P
79 If you set the I2C_M_NOSTART variable for the first partial message,
80 we do not generate Addr, but we do generate the startbit S. This will
81 probably confuse all other clients on your bus, so don't try this.
83 This is often used to gather transmits from multiple data buffers in
84 system memory into something that appears as a single transfer to the
85 I2C device but may also be used between direction changes by some
89 This toggles the Rd/Wr flag. That is, if you want to do a write, but
90 need to emit an Rd instead of a Wr, or vice versa, you set this
93 S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
96 Force a stop condition (P) after the message. Some I2C related protocols
97 like SCCB require that. Normally, you really don't want to get interrupted
98 between the messages of one transfer.