arch/arc/include/asm/entry-compact.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
   4  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   5  *
   6  * Vineetg: March 2009 (Supporting 2 levels of Interrupts)
   7  *  Stack switching code can no longer reliably rely on the fact that
   8  *  if we are NOT in user mode, stack is switched to kernel mode.
   9  *  e.g. L2 IRQ interrupted a L1 ISR which had not yet completed
  10  *  it's prologue including stack switching from user mode
  11  *
  12  * Vineetg: Aug 28th 2008: Bug #94984
  13  *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
  14  *   Normally CPU does this automatically, however when doing FAKE rtie,
  15  *   we also need to explicitly do this. The problem in macros
  16  *   FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit
  17  *   was being "CLEARED" rather then "SET". Actually "SET" clears ZOL context
  18  *
  19  * Vineetg: May 5th 2008
  20  *  -Modified CALLEE_REG save/restore macros to handle the fact that
  21  *      r25 contains the kernel current task ptr
  22  *  - Defined Stack Switching Macro to be reused in all intr/excp hdlrs
  23  *  - Shaved off 11 instructions from RESTORE_ALL_INT1 by using the
  24  *      address Write back load ld.ab instead of seperate ld/add instn
  25  *
  26  * Amit Bhor, Sameer Dhavale: Codito Technologies 2004
  27  */
  28
  29 #ifndef __ASM_ARC_ENTRY_COMPACT_H
  30 #define __ASM_ARC_ENTRY_COMPACT_H
  31
  32 #include <asm/asm-offsets.h>
  33 #include <asm/irqflags-compact.h>
  34 #include <asm/thread_info.h>    /* For THREAD_SIZE */
  35
  36 #ifdef CONFIG_ARC_PLAT_EZNPS
  37 #include <plat/ctop.h>
  38 #endif
  39
  40 /*--------------------------------------------------------------
  41  * Switch to Kernel Mode stack if SP points to User Mode stack
  42  *
  43  * Entry   : r9 contains pre-IRQ/exception/trap status32
  44  * Exit    : SP set to K mode stack
  45  *           SP at the time of entry (K/U) saved @ pt_regs->sp
  46  * Clobbers: r9
  47  *-------------------------------------------------------------*/
  48
  49 .macro SWITCH_TO_KERNEL_STK
  50
  51         /* User Mode when this happened ? Yes: Proceed to switch stack */
  52         bbit1   r9, STATUS_U_BIT, 88f
  53
  54         /* OK we were already in kernel mode when this event happened, thus can
  55          * assume SP is kernel mode SP. _NO_ need to do any stack switching
  56          */
  57
  58 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
  59         /* However....
  60          * If Level 2 Interrupts enabled, we may end up with a corner case:
  61          * 1. User Task executing
  62          * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
  63          * 3. But before it could switch SP from USER to KERNEL stack
  64          *      a L2 IRQ "Interrupts" L1
  65          * Thay way although L2 IRQ happened in Kernel mode, stack is still
  66          * not switched.
  67          * To handle this, we may need to switch stack even if in kernel mode
  68          * provided SP has values in range of USER mode stack ( < 0x7000_0000 )
  69          */
  70         brlo sp, VMALLOC_START, 88f
  71
  72         /* TODO: vineetg:
  73          * We need to be a bit more cautious here. What if a kernel bug in
  74          * L1 ISR, caused SP to go whaco (some small value which looks like
  75          * USER stk) and then we take L2 ISR.
  76          * Above brlo alone would treat it as a valid L1-L2 scenario
  77          * instead of shouting around
  78          * The only feasible way is to make sure this L2 happened in
  79          * L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in
  80          * L1 ISR before it switches stack
  81          */
  82
  83 #endif
  84
  85     /*------Intr/Ecxp happened in kernel mode, SP already setup ------ */
  86         /* save it nevertheless @ pt_regs->sp for uniformity */
  87
  88         b.d     66f
  89         st      sp, [sp, PT_sp - SZ_PT_REGS]
  90
  91 88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */
  92
  93         GET_CURR_TASK_ON_CPU   r9
  94
  95         /* With current tsk in r9, get it's kernel mode stack base */
  96         GET_TSK_STACK_BASE  r9, r9
  97
  98         /* save U mode SP @ pt_regs->sp */
  99         st      sp, [r9, PT_sp - SZ_PT_REGS]
 100
 101         /* final SP switch */
 102         mov     sp, r9
 103 66:
 104 .endm
 105
 106 /*------------------------------------------------------------
 107  * "FAKE" a rtie to return from CPU Exception context
 108  * This is to re-enable Exceptions within exception
 109  * Look at EV_ProtV to see how this is actually used
 110  *-------------------------------------------------------------*/
 111
 112 .macro FAKE_RET_FROM_EXCPN
 113
 114         lr      r9, [status32]
 115         bclr    r9, r9, STATUS_AE_BIT
 116         or      r9, r9, (STATUS_E1_MASK|STATUS_E2_MASK)
 117         sr      r9, [erstatus]
 118         mov     r9, 55f
 119         sr      r9, [eret]
 120         rtie
 121 55:
 122 .endm
 123
 124 /*--------------------------------------------------------------
 125  * For early Exception/ISR Prologue, a core reg is temporarily needed to
 126  * code the rest of prolog (stack switching). This is done by stashing
 127  * it to memory (non-SMP case) or SCRATCH0 Aux Reg (SMP).
 128  *
 129  * Before saving the full regfile - this reg is restored back, only
 130  * to be saved again on kernel mode stack, as part of pt_regs.
 131  *-------------------------------------------------------------*/
 132 .macro PROLOG_FREEUP_REG        reg, mem
 133 #ifndef ARC_USE_SCRATCH_REG
 134         sr  \reg, [ARC_REG_SCRATCH_DATA0]
 135 #else
 136         st  \reg, [\mem]
 137 #endif
 138 .endm
 139
 140 .macro PROLOG_RESTORE_REG       reg, mem
 141 #ifndef ARC_USE_SCRATCH_REG
 142         lr  \reg, [ARC_REG_SCRATCH_DATA0]
 143 #else
 144         ld  \reg, [\mem]
 145 #endif
 146 .endm
 147
 148 /*--------------------------------------------------------------
 149  * Exception Entry prologue
 150  * -Switches stack to K mode (if not already)
 151  * -Saves the register file
 152  *
 153  * After this it is safe to call the "C" handlers
 154  *-------------------------------------------------------------*/
 155 .macro EXCEPTION_PROLOGUE
 156
 157         /* Need at least 1 reg to code the early exception prologue */
 158         PROLOG_FREEUP_REG r9, @ex_saved_reg1
 159
 160         /* U/K mode at time of exception (stack not switched if already K) */
 161         lr  r9, [erstatus]
 162
 163         /* ARC700 doesn't provide auto-stack switching */
 164         SWITCH_TO_KERNEL_STK
 165
 166 #ifdef CONFIG_ARC_CURR_IN_REG
 167         /* Treat r25 as scratch reg (save on stack) and load with "current" */
 168         PUSH    r25
 169         GET_CURR_TASK_ON_CPU   r25
 170 #else
 171         sub     sp, sp, 4
 172 #endif
 173
 174         st.a    r0, [sp, -8]    /* orig_r0 needed for syscall (skip ECR slot) */
 175         sub     sp, sp, 4       /* skip pt_regs->sp, already saved above */
 176
 177         /* Restore r9 used to code the early prologue */
 178         PROLOG_RESTORE_REG  r9, @ex_saved_reg1
 179
 180         /* now we are ready to save the regfile */
 181         SAVE_R0_TO_R12
 182         PUSH    gp
 183         PUSH    fp
 184         PUSH    blink
 185         PUSHAX  eret
 186         PUSHAX  erstatus
 187         PUSH    lp_count
 188         PUSHAX  lp_end
 189         PUSHAX  lp_start
 190         PUSHAX  erbta
 191
 192 #ifdef CONFIG_ARC_PLAT_EZNPS
 193         .word CTOP_INST_SCHD_RW
 194         PUSHAX  CTOP_AUX_GPA1
 195         PUSHAX  CTOP_AUX_EFLAGS
 196 #endif
 197
 198         lr      r10, [ecr]
 199         st      r10, [sp, PT_event]    /* EV_Trap expects r10 to have ECR */
 200 .endm
 201
 202 /*--------------------------------------------------------------
 203  * Restore all registers used by system call or Exceptions
 204  * SP should always be pointing to the next free stack element
 205  * when entering this macro.
 206  *
 207  * NOTE:
 208  *
 209  * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
 210  * for memory load operations. If used in that way interrupts are deffered
 211  * by hardware and that is not good.
 212  *-------------------------------------------------------------*/
 213 .macro EXCEPTION_EPILOGUE
 214 #ifdef CONFIG_ARC_PLAT_EZNPS
 215         .word CTOP_INST_SCHD_RW
 216         POPAX   CTOP_AUX_EFLAGS
 217         POPAX   CTOP_AUX_GPA1
 218 #endif
 219
 220         POPAX   erbta
 221         POPAX   lp_start
 222         POPAX   lp_end
 223
 224         POP     r9
 225         mov     lp_count, r9    ;LD to lp_count is not allowed
 226
 227         POPAX   erstatus
 228         POPAX   eret
 229         POP     blink
 230         POP     fp
 231         POP     gp
 232         RESTORE_R12_TO_R0
 233
 234 #ifdef CONFIG_ARC_CURR_IN_REG
 235         ld      r25, [sp, 12]
 236 #endif
 237         ld  sp, [sp] /* restore original sp */
 238         /* orig_r0, ECR, user_r25 skipped automatically */
 239 .endm
 240
 241 /* Dummy ECR values for Interrupts */
 242 #define event_IRQ1              0x0031abcd
 243 #define event_IRQ2              0x0032abcd
 244
 245 .macro INTERRUPT_PROLOGUE  LVL
 246
 247         /* free up r9 as scratchpad */
 248         PROLOG_FREEUP_REG r9, @int\LVL\()_saved_reg
 249
 250         /* Which mode (user/kernel) was the system in when intr occurred */
 251         lr  r9, [status32_l\LVL\()]
 252
 253         SWITCH_TO_KERNEL_STK
 254
 255 #ifdef CONFIG_ARC_CURR_IN_REG
 256         /* Treat r25 as scratch reg (save on stack) and load with "current" */
 257         PUSH    r25
 258         GET_CURR_TASK_ON_CPU   r25
 259 #else
 260         sub     sp, sp, 4
 261 #endif
 262
 263         PUSH    0x003\LVL\()abcd    /* Dummy ECR */
 264         sub     sp, sp, 8           /* skip orig_r0 (not needed)
 265                                        skip pt_regs->sp, already saved above */
 266
 267         /* Restore r9 used to code the early prologue */
 268         PROLOG_RESTORE_REG  r9, @int\LVL\()_saved_reg
 269
 270         SAVE_R0_TO_R12
 271         PUSH    gp
 272         PUSH    fp
 273         PUSH    blink
 274         PUSH    ilink\LVL\()
 275         PUSHAX  status32_l\LVL\()
 276         PUSH    lp_count
 277         PUSHAX  lp_end
 278         PUSHAX  lp_start
 279         PUSHAX  bta_l\LVL\()
 280
 281 #ifdef CONFIG_ARC_PLAT_EZNPS
 282         .word CTOP_INST_SCHD_RW
 283         PUSHAX  CTOP_AUX_GPA1
 284         PUSHAX  CTOP_AUX_EFLAGS
 285 #endif
 286 .endm
 287
 288 /*--------------------------------------------------------------
 289  * Restore all registers used by interrupt handlers.
 290  *
 291  * NOTE:
 292  *
 293  * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
 294  * for memory load operations. If used in that way interrupts are deffered
 295  * by hardware and that is not good.
 296  *-------------------------------------------------------------*/
 297 .macro INTERRUPT_EPILOGUE  LVL
 298 #ifdef CONFIG_ARC_PLAT_EZNPS
 299         .word CTOP_INST_SCHD_RW
 300         POPAX   CTOP_AUX_EFLAGS
 301         POPAX   CTOP_AUX_GPA1
 302 #endif
 303
 304         POPAX   bta_l\LVL\()
 305         POPAX   lp_start
 306         POPAX   lp_end
 307
 308         POP     r9
 309         mov     lp_count, r9    ;LD to lp_count is not allowed
 310
 311         POPAX   status32_l\LVL\()
 312         POP     ilink\LVL\()
 313         POP     blink
 314         POP     fp
 315         POP     gp
 316         RESTORE_R12_TO_R0
 317
 318 #ifdef CONFIG_ARC_CURR_IN_REG
 319         ld      r25, [sp, 12]
 320 #endif
 321         ld  sp, [sp] /* restore original sp */
 322         /* orig_r0, ECR, user_r25 skipped automatically */
 323 .endm
 324
 325 /* Get thread_info of "current" tsk */
 326 .macro GET_CURR_THR_INFO_FROM_SP  reg
 327         bic \reg, sp, (THREAD_SIZE - 1)
 328 .endm
 329
 330 #ifndef CONFIG_ARC_PLAT_EZNPS
 331 /* Get CPU-ID of this core */
 332 .macro  GET_CPU_ID  reg
 333         lr  \reg, [identity]
 334         lsr \reg, \reg, 8
 335         bmsk \reg, \reg, 7
 336 .endm
 337 #endif
 338
 339 #endif  /* __ASM_ARC_ENTRY_COMPACT_H */