arch/arm/boot/dts/am335x-sancloud-bbe.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5 /dts-v1/;
   6
   7 #include "am33xx.dtsi"
   8 #include "am335x-bone-common.dtsi"
   9 #include "am335x-boneblack-common.dtsi"
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11
  12 / {
  13         model = "SanCloud BeagleBone Enhanced";
  14         compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
  15 };
  16
  17 &am33xx_pinmux {
  18         pinctrl-names = "default";
  19
  20         cpsw_default: cpsw_default {
  21                 pinctrl-single,pins = <
  22                         /* Slave 1 */
  23                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)   /* mii1_txen.rgmii1_tctl */
  24                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)    /* mii1_rxdv.rgmii1_rctl */
  25                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
  26                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
  27                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
  28                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
  29                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)  /* mii1_txclk.rgmii1_tclk */
  30                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)   /* mii1_rxclk.rgmii1_rclk */
  31                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)     /* mii1_rxd3.rgmii1_rd3 */
  32                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)     /* mii1_rxd2.rgmii1_rd2 */
  33                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
  34                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
  35                 >;
  36         };
  37
  38         cpsw_sleep: cpsw_sleep {
  39                 pinctrl-single,pins = <
  40                         /* Slave 1 reset value */
  41                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  42                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
  43                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  44                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  45                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  46                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  47                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  48                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  49                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  50                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  51                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  52                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  53                 >;
  54         };
  55
  56         davinci_mdio_default: davinci_mdio_default {
  57                 pinctrl-single,pins = <
  58                         /* MDIO */
  59                         AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
  60                         AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
  61                 >;
  62         };
  63
  64         davinci_mdio_sleep: davinci_mdio_sleep {
  65                 pinctrl-single,pins = <
  66                         /* MDIO reset value */
  67                         AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
  68                         AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
  69                 >;
  70         };
  71
  72         usb_hub_ctrl: usb_hub_ctrl {
  73                 pinctrl-single,pins = <
  74                         AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7)     /* rmii1_refclk.gpio0_29 */
  75                 >;
  76         };
  77
  78         mpu6050_pins: pinmux_mpu6050_pins {
  79                 pinctrl-single,pins = <
  80                         AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7)    /* uart0_ctsn.gpio1_8 */
  81                 >;
  82         };
  83
  84         lps3331ap_pins: pinmux_lps3331ap_pins {
  85                 pinctrl-single,pins = <
  86                         AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7)     /* gpmc_a10.gpio1_26 */
  87                 >;
  88         };
  89 };
  90
  91 &mac {
  92         pinctrl-names = "default", "sleep";
  93         pinctrl-0 = <&cpsw_default>;
  94         pinctrl-1 = <&cpsw_sleep>;
  95         status = "okay";
  96 };
  97
  98 &davinci_mdio {
  99         pinctrl-names = "default", "sleep";
 100         pinctrl-0 = <&davinci_mdio_default>;
 101         pinctrl-1 = <&davinci_mdio_sleep>;
 102         status = "okay";
 103
 104         ethphy0: ethernet-phy@0 {
 105                 reg = <0>;
 106         };
 107 };
 108
 109 &cpsw_emac0 {
 110         phy-handle = <&ethphy0>;
 111         phy-mode = "rgmii-id";
 112 };
 113
 114 &i2c0 {
 115         lps331ap: barometer@5c {
 116                 compatible = "st,lps331ap-press";
 117                 st,drdy-int-pin = <1>;
 118                 reg = <0x5c>;
 119                 interrupt-parent = <&gpio1>;
 120                 interrupts = <26 IRQ_TYPE_EDGE_RISING>;
 121         };
 122
 123         mpu6050: accelerometer@68 {
 124                 compatible = "invensense,mpu6050";
 125                 reg = <0x68>;
 126                 interrupt-parent = <&gpio0>;
 127                 interrupts = <2 IRQ_TYPE_EDGE_RISING>;
 128                 orientation = <0xff 0 0 0 1 0 0 0 0xff>;
 129         };
 130
 131         usb2512b: usb-hub@2c {
 132                 compatible = "microchip,usb2512b";
 133                 reg = <0x2c>;
 134                 reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
 135                 /* wifi on port 4 */
 136         };
 137 };