arch/arm/boot/dts/am437x-idk-evm.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "am4372.dtsi"
   9 #include <dt-bindings/pinctrl/am43xx.h>
  10 #include <dt-bindings/pwm/pwm.h>
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/input/input.h>
  13
  14 / {
  15         model = "TI AM437x Industrial Development Kit";
  16         compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
  17
  18         chosen {
  19                 stdout-path = &uart0;
  20         };
  21
  22         v24_0d: fixed-regulator-v24_0d {
  23                 compatible = "regulator-fixed";
  24                 regulator-name = "V24_0D";
  25                 regulator-min-microvolt = <24000000>;
  26                 regulator-max-microvolt = <24000000>;
  27                 regulator-always-on;
  28                 regulator-boot-on;
  29         };
  30
  31         v3_3d: fixed-regulator-v3_3d {
  32                 compatible = "regulator-fixed";
  33                 regulator-name = "V3_3D";
  34                 regulator-min-microvolt = <3300000>;
  35                 regulator-max-microvolt = <3300000>;
  36                 regulator-always-on;
  37                 regulator-boot-on;
  38                 vin-supply = <&v24_0d>;
  39         };
  40
  41         vdd_corereg: fixed-regulator-vdd_corereg {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "VDD_COREREG";
  44                 regulator-min-microvolt = <1100000>;
  45                 regulator-max-microvolt = <1100000>;
  46                 regulator-always-on;
  47                 regulator-boot-on;
  48                 vin-supply = <&v24_0d>;
  49         };
  50
  51         vdd_core: fixed-regulator-vdd_core {
  52                 compatible = "regulator-fixed";
  53                 regulator-name = "VDD_CORE";
  54                 regulator-min-microvolt = <1100000>;
  55                 regulator-max-microvolt = <1100000>;
  56                 regulator-always-on;
  57                 regulator-boot-on;
  58                 vin-supply = <&vdd_corereg>;
  59         };
  60
  61         v1_8dreg: fixed-regulator-v1_8dreg{
  62                 compatible = "regulator-fixed";
  63                 regulator-name = "V1_8DREG";
  64                 regulator-min-microvolt = <1800000>;
  65                 regulator-max-microvolt = <1800000>;
  66                 regulator-always-on;
  67                 regulator-boot-on;
  68                 vin-supply = <&v24_0d>;
  69         };
  70
  71         v1_8d: fixed-regulator-v1_8d{
  72                 compatible = "regulator-fixed";
  73                 regulator-name = "V1_8D";
  74                 regulator-min-microvolt = <1800000>;
  75                 regulator-max-microvolt = <1800000>;
  76                 regulator-always-on;
  77                 regulator-boot-on;
  78                 vin-supply = <&v1_8dreg>;
  79         };
  80
  81         v1_5dreg: fixed-regulator-v1_5dreg{
  82                 compatible = "regulator-fixed";
  83                 regulator-name = "V1_5DREG";
  84                 regulator-min-microvolt = <1500000>;
  85                 regulator-max-microvolt = <1500000>;
  86                 regulator-always-on;
  87                 regulator-boot-on;
  88                 vin-supply = <&v24_0d>;
  89         };
  90
  91         v1_5d: fixed-regulator-v1_5d{
  92                 compatible = "regulator-fixed";
  93                 regulator-name = "V1_5D";
  94                 regulator-min-microvolt = <1500000>;
  95                 regulator-max-microvolt = <1500000>;
  96                 regulator-always-on;
  97                 regulator-boot-on;
  98                 vin-supply = <&v1_5dreg>;
  99         };
 100
 101         gpio_keys: gpio_keys {
 102                 compatible = "gpio-keys";
 103                 pinctrl-names = "default";
 104                 pinctrl-0 = <&gpio_keys_pins_default>;
 105                 #address-cells = <1>;
 106                 #size-cells = <0>;
 107
 108                 switch0 {
 109                         label = "power-button";
 110                         linux,code = <KEY_POWER>;
 111                         gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
 112                 };
 113         };
 114
 115         /* fixed 32k external oscillator clock */
 116         clk_32k_rtc: clk_32k_rtc {
 117                 #clock-cells = <0>;
 118                 compatible = "fixed-clock";
 119                 clock-frequency = <32768>;
 120         };
 121
 122         leds-iio {
 123                 status = "disabled";
 124                 compatible = "gpio-leds";
 125                 led-out0 {
 126                         label = "out0";
 127                         gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
 128                         default-state = "off";
 129                 };
 130
 131                 led-out1 {
 132                         label = "out1";
 133                         gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
 134                         default-state = "off";
 135                 };
 136
 137                 led-out2 {
 138                         label = "out2";
 139                         gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
 140                         default-state = "off";
 141                 };
 142
 143                 led-out3 {
 144                         label = "out3";
 145                         gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
 146                         default-state = "off";
 147                 };
 148
 149                 led-out4 {
 150                         label = "out4";
 151                         gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
 152                         default-state = "off";
 153                 };
 154
 155                 led-out5 {
 156                         label = "out5";
 157                         gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
 158                         default-state = "off";
 159                 };
 160
 161                 led-out6 {
 162                         label = "out6";
 163                         gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
 164                         default-state = "off";
 165                 };
 166
 167                 led-out7 {
 168                         label = "out7";
 169                         gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
 170                         default-state = "off";
 171                 };
 172         };
 173 };
 174
 175 &am43xx_pinmux {
 176         gpio_keys_pins_default: gpio_keys_pins_default {
 177                 pinctrl-single,pins = <
 178                         AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7)      /* cam0_field.gpio4_2 */
 179                 >;
 180         };
 181
 182         i2c0_pins_default: i2c0_pins_default {
 183                 pinctrl-single,pins = <
 184                         AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
 185                         AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
 186                 >;
 187         };
 188
 189         i2c0_pins_sleep: i2c0_pins_sleep {
 190                 pinctrl-single,pins = <
 191                         AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
 192                         AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 193                 >;
 194         };
 195
 196         i2c2_pins_default: i2c2_pins_default {
 197                 pinctrl-single,pins = <
 198                         AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
 199                         AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
 200                 >;
 201         };
 202
 203         i2c2_pins_sleep: i2c2_pins_sleep {
 204                 pinctrl-single,pins = <
 205                         AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 206                         AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
 207                 >;
 208         };
 209
 210         mmc1_pins_default: pinmux_mmc1_pins_default {
 211                 pinctrl-single,pins = <
 212                         AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
 213                         AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
 214                         AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
 215                         AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
 216                         AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
 217                         AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
 218                         AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 219                 >;
 220         };
 221
 222         mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
 223                 pinctrl-single,pins = <
 224                         AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
 225                         AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
 226                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 227                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
 228                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 229                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
 230                         AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
 231                 >;
 232         };
 233
 234         spi1_pins_default: spi1_pins_default {
 235                 pinctrl-single,pins = <
 236                         AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2)      /* mii1_col.spi1_sclk */
 237                         AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2)      /* mii1_rx_er.spi1_d1 */
 238                         AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2)     /* rmii1_ref_clk.spi1_cs0 */
 239                         AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7)     /* mii1_crs.gpio3_1 */
 240                 >;
 241         };
 242
 243         spi1_pins_sleep: spi1_pins_sleep {
 244                 pinctrl-single,pins = <
 245                         AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
 246                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 247                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 248                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 249                 >;
 250         };
 251
 252         ecap0_pins_default: backlight_pins_default {
 253                 pinctrl-single,pins = <
 254                         AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
 255                 >;
 256         };
 257
 258         cpsw_default: cpsw_default {
 259                 pinctrl-single,pins = <
 260                         AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
 261                         AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
 262                         AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
 263                         AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
 264                         AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td2 */
 265                         AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td3 */
 266                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
 267                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rctl */
 268                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
 269                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
 270                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd2 */
 271                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd3 */
 272                 >;
 273         };
 274
 275         cpsw_sleep: cpsw_sleep {
 276                 pinctrl-single,pins = <
 277                         AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 278                         AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 279                         AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 280                         AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 281                         AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
 282                         AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 283                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
 284                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 285                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 286                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 287                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
 288                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 289                 >;
 290         };
 291
 292         davinci_mdio_default: davinci_mdio_default {
 293                 pinctrl-single,pins = <
 294                         /* MDIO */
 295                         AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 296                         AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 297                 >;
 298         };
 299
 300         davinci_mdio_sleep: davinci_mdio_sleep {
 301                 pinctrl-single,pins = <
 302                         /* MDIO reset value */
 303                         AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 304                         AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 305                 >;
 306         };
 307
 308         qspi_pins_default: qspi_pins_default {
 309                 pinctrl-single,pins = <
 310                         AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3)      /* gpmc_csn0.qspi_csn */
 311                         AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)             /* gpmc_csn3.qspi_clk */
 312                         AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_advn_ale.qspi_d0 */
 313                         AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_oen_ren.qspi_d1 */
 314                         AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_wen.qspi_d2 */
 315                         AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_be0n_cle.qspi_d3 */
 316                 >;
 317         };
 318
 319         qspi_pins_sleep: qspi_pins_sleep{
 320                 pinctrl-single,pins = <
 321                         AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 322                         AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
 323                         AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
 324                         AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
 325                         AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
 326                         AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 327                 >;
 328         };
 329 };
 330
 331 &i2c0 {
 332         status = "okay";
 333         pinctrl-names = "default", "sleep";
 334         pinctrl-0 = <&i2c0_pins_default>;
 335         pinctrl-1 = <&i2c0_pins_sleep>;
 336         clock-frequency = <400000>;
 337
 338         at24@50 {
 339                 compatible = "atmel,24c256";
 340                 pagesize = <64>;
 341                 reg = <0x50>;
 342         };
 343
 344         tps: tps62362@60 {
 345                 compatible = "ti,tps62362";
 346                 reg = <0x60>;
 347                 regulator-name = "VDD_MPU";
 348                 regulator-min-microvolt = <950000>;
 349                 regulator-max-microvolt = <1330000>;
 350                 regulator-boot-on;
 351                 regulator-always-on;
 352                 ti,vsel0-state-high;
 353                 ti,vsel1-state-high;
 354                 vin-supply = <&v3_3d>;
 355         };
 356 };
 357
 358 &i2c2 {
 359         status = "okay";
 360         pinctrl-names = "default", "sleep";
 361         pinctrl-0 = <&i2c2_pins_default>;
 362         pinctrl-1 = <&i2c2_pins_sleep>;
 363         clock-frequency = <100000>;
 364
 365         tpic2810: tpic2810@60 {
 366                 compatible = "ti,tpic2810";
 367                 reg = <0x60>;
 368                 gpio-controller;
 369                 #gpio-cells = <2>;
 370         };
 371 };
 372
 373 &spi1 {
 374         status = "okay";
 375         pinctrl-names = "default", "sleep";
 376         pinctrl-0 = <&spi1_pins_default>;
 377         pinctrl-1 = <&spi1_pins_sleep>;
 378         ti,pindir-d0-out-d1-in;
 379
 380         sn65hvs882: sn65hvs882@0 {
 381                 compatible = "pisosr-gpio";
 382                 gpio-controller;
 383                 #gpio-cells = <2>;
 384
 385                 load-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
 386
 387                 reg = <0>;
 388                 spi-max-frequency = <1000000>;
 389                 spi-cpol;
 390         };
 391 };
 392
 393 &epwmss0 {
 394         status = "okay";
 395 };
 396
 397 &ecap0 {
 398         status = "okay";
 399         pinctrl-names = "default";
 400         pinctrl-0 = <&ecap0_pins_default>;
 401 };
 402
 403 &gpio0 {
 404         status = "okay";
 405 };
 406
 407 &gpio1 {
 408         status = "okay";
 409 };
 410
 411 &gpio3 {
 412         status = "okay";
 413 };
 414
 415 &gpio4 {
 416         status = "okay";
 417 };
 418
 419 &gpio5 {
 420         status = "okay";
 421 };
 422
 423 &mmc1 {
 424         status = "okay";
 425         pinctrl-names = "default", "sleep";
 426         pinctrl-0 = <&mmc1_pins_default>;
 427         pinctrl-1 = <&mmc1_pins_sleep>;
 428         vmmc-supply = <&v3_3d>;
 429         bus-width = <4>;
 430         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 431 };
 432
 433 &qspi {
 434         status = "okay";
 435         pinctrl-names = "default", "sleep";
 436         pinctrl-0 = <&qspi_pins_default>;
 437         pinctrl-1 = <&qspi_pins_sleep>;
 438
 439         spi-max-frequency = <48000000>;
 440         m25p80@0 {
 441                 compatible = "mx66l51235l";
 442                 spi-max-frequency = <48000000>;
 443                 reg = <0>;
 444                 spi-cpol;
 445                 spi-cpha;
 446                 spi-tx-bus-width = <1>;
 447                 spi-rx-bus-width = <4>;
 448                 #address-cells = <1>;
 449                 #size-cells = <1>;
 450
 451                 /*
 452                  * MTD partition table.  The ROM checks the first 512KiB for a
 453                  * valid file to boot(XIP).
 454                  */
 455                 partition@0 {
 456                         label = "QSPI.U_BOOT";
 457                         reg = <0x00000000 0x000080000>;
 458                 };
 459                 partition@1 {
 460                         label = "QSPI.U_BOOT.backup";
 461                         reg = <0x00080000 0x00080000>;
 462                 };
 463                 partition@2 {
 464                         label = "QSPI.U-BOOT-SPL_OS";
 465                         reg = <0x00100000 0x00010000>;
 466                 };
 467                 partition@3 {
 468                         label = "QSPI.U_BOOT_ENV";
 469                         reg = <0x00110000 0x00010000>;
 470                 };
 471                 partition@4 {
 472                         label = "QSPI.U-BOOT-ENV.backup";
 473                         reg = <0x00120000 0x00010000>;
 474                 };
 475                 partition@5 {
 476                         label = "QSPI.KERNEL";
 477                         reg = <0x00130000 0x0800000>;
 478                 };
 479                 partition@6 {
 480                         label = "QSPI.FILESYSTEM";
 481                         reg = <0x00930000 0x36D0000>;
 482                 };
 483         };
 484 };
 485
 486 &mac {
 487         slaves = <1>;
 488         pinctrl-names = "default", "sleep";
 489         pinctrl-0 = <&cpsw_default>;
 490         pinctrl-1 = <&cpsw_sleep>;
 491         status = "okay";
 492 };
 493
 494 &davinci_mdio {
 495         pinctrl-names = "default", "sleep";
 496         pinctrl-0 = <&davinci_mdio_default>;
 497         pinctrl-1 = <&davinci_mdio_sleep>;
 498         status = "okay";
 499
 500         ethphy0: ethernet-phy@0 {
 501                 reg = <0>;
 502         };
 503 };
 504
 505 &cpsw_emac0 {
 506         phy-handle = <&ethphy0>;
 507         phy-mode = "rgmii";
 508 };
 509
 510 &rtc {
 511         clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
 512         clock-names = "ext-clk", "int-clk";
 513         status = "okay";
 514 };
 515
 516 &wdt {
 517         status = "okay";
 518 };
 519
 520 &cpu {
 521         cpu0-supply = <&tps>;
 522 };
 523
 524 &cpu0_opp_table {
 525         /*
 526          * Supply voltage supervisor on board will not allow opp50 so
 527          * disable it and set opp100 as suspend OPP.
 528          */
 529         opp50@300000000 {
 530                 status = "disabled";
 531         };
 532
 533         opp100@600000000 {
 534                 opp-suspend;
 535         };
 536 };