| blob | 0dd59ee14585bee4ff04919b4257df6e1b0d8de7 |
1 &l4_wkup { /* 0x44c00000 */
2 compatible = "ti,am4-l4-wkup", "simple-bus";
3 reg = <0x44c00000 0x800>,
4 <0x44c00800 0x800>,
5 <0x44c01000 0x400>,
6 <0x44c01400 0x400>;
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
14 segment@0 { /* 0x44c00000 */
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
19 <0x00000800 0x00000800 0x000800>, /* ap 1 */
20 <0x00001000 0x00001000 0x000400>, /* ap 2 */
21 <0x00001400 0x00001400 0x000400>; /* ap 3 */
22 };
24 segment@100000 { /* 0x44d00000 */
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
29 <0x00004000 0x00104000 0x001000>, /* ap 5 */
30 <0x00080000 0x00180000 0x002000>, /* ap 6 */
31 <0x00082000 0x00182000 0x001000>, /* ap 7 */
32 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */
34 target-module@0 { /* 0x44d00000, ap 4 28.0 */
35 compatible = "ti,sysc";
36 status = "disabled";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 ranges = <0x0 0x0 0x4000>;
40 };
42 target-module@80000 { /* 0x44d80000, ap 6 10.0 */
43 compatible = "ti,sysc";
44 status = "disabled";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges = <0x0 0x80000 0x2000>;
48 };
50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */
51 compatible = "ti,sysc-omap4", "ti,sysc";
52 reg = <0xf0000 0x4>;
53 reg-names = "rev";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges = <0x0 0xf0000 0x10000>;
58 prcm: prcm@0 {
59 compatible = "ti,am4-prcm", "simple-bus";
60 reg = <0x0 0x11000>;
61 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges = <0 0 0x11000>;
66 prcm_clocks: clocks {
67 #address-cells = <1>;
68 #size-cells = <0>;
69 };
71 prcm_clockdomains: clockdomains {
72 };
73 };
74 };
75 };
77 segment@200000 { /* 0x44e00000 */
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */
82 <0x00003000 0x00203000 0x001000>, /* ap 10 */
83 <0x00004000 0x00204000 0x001000>, /* ap 11 */
84 <0x00005000 0x00205000 0x001000>, /* ap 12 */
85 <0x00006000 0x00206000 0x001000>, /* ap 13 */
86 <0x00007000 0x00207000 0x001000>, /* ap 14 */
87 <0x00008000 0x00208000 0x001000>, /* ap 15 */
88 <0x00009000 0x00209000 0x001000>, /* ap 16 */
89 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */
90 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */
91 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */
92 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */
93 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */
94 <0x00010000 0x00210000 0x010000>, /* ap 22 */
95 <0x00030000 0x00230000 0x001000>, /* ap 23 */
96 <0x00031000 0x00231000 0x001000>, /* ap 24 */
97 <0x00032000 0x00232000 0x001000>, /* ap 25 */
98 <0x00033000 0x00233000 0x001000>, /* ap 26 */
99 <0x00034000 0x00234000 0x001000>, /* ap 27 */
100 <0x00035000 0x00235000 0x001000>, /* ap 28 */
101 <0x00036000 0x00236000 0x001000>, /* ap 29 */
102 <0x00037000 0x00237000 0x001000>, /* ap 30 */
103 <0x00038000 0x00238000 0x001000>, /* ap 31 */
104 <0x00039000 0x00239000 0x001000>, /* ap 32 */
105 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */
106 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */
107 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */
108 <0x00040000 0x00240000 0x040000>, /* ap 36 */
109 <0x00080000 0x00280000 0x001000>, /* ap 37 */
110 <0x00088000 0x00288000 0x008000>, /* ap 38 */
111 <0x00092000 0x00292000 0x001000>, /* ap 39 */
112 <0x00086000 0x00286000 0x001000>, /* ap 40 */
113 <0x00087000 0x00287000 0x001000>, /* ap 41 */
114 <0x00090000 0x00290000 0x001000>, /* ap 42 */
115 <0x00091000 0x00291000 0x001000>; /* ap 43 */
117 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */
118 compatible = "ti,sysc";
119 status = "disabled";
120 #address-cells = <1>;
121 #size-cells = <1>;
122 ranges = <0x0 0x3000 0x1000>;
123 };
125 target-module@5000 { /* 0x44e05000, ap 12 30.0 */
126 compatible = "ti,sysc";
127 status = "disabled";
128 #address-cells = <1>;
129 #size-cells = <1>;
130 ranges = <0x0 0x5000 0x1000>;
131 };
133 target-module@7000 { /* 0x44e07000, ap 14 20.0 */
134 compatible = "ti,sysc-omap2", "ti,sysc";
135 reg = <0x7000 0x4>,
136 <0x7010 0x4>,
137 <0x7114 0x4>;
138 reg-names = "rev", "sysc", "syss";
139 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
140 SYSC_OMAP2_SOFTRESET |
141 SYSC_OMAP2_AUTOIDLE)>;
142 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
143 <SYSC_IDLE_NO>,
144 <SYSC_IDLE_SMART>,
145 <SYSC_IDLE_SMART_WKUP>;
146 ti,syss-mask = <1>;
147 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
148 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>,
149 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>;
150 clock-names = "fck", "dbclk";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 ranges = <0x0 0x7000 0x1000>;
155 gpio0: gpio@0 {
156 compatible = "ti,am4372-gpio","ti,omap4-gpio";
157 reg = <0x0 0x1000>;
158 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
159 gpio-controller;
160 #gpio-cells = <2>;
161 interrupt-controller;
162 #interrupt-cells = <2>;
163 status = "disabled";
164 };
165 };
167 target-module@9000 { /* 0x44e09000, ap 16 04.0 */
168 compatible = "ti,sysc-omap2", "ti,sysc";
169 reg = <0x9050 0x4>,
170 <0x9054 0x4>,
171 <0x9058 0x4>;
172 reg-names = "rev", "sysc", "syss";
173 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
174 SYSC_OMAP2_SOFTRESET |
175 SYSC_OMAP2_AUTOIDLE)>;
176 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
177 <SYSC_IDLE_NO>,
178 <SYSC_IDLE_SMART>,
179 <SYSC_IDLE_SMART_WKUP>;
180 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
181 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>;
182 clock-names = "fck";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 ranges = <0x0 0x9000 0x1000>;
187 uart0: serial@0 {
188 compatible = "ti,am4372-uart","ti,omap2-uart";
189 reg = <0x0 0x2000>;
190 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
191 };
192 };
194 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */
195 compatible = "ti,sysc-omap2", "ti,sysc";
196 reg = <0xb000 0x8>,
197 <0xb010 0x8>,
198 <0xb090 0x8>;
199 reg-names = "rev", "sysc", "syss";
200 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
201 SYSC_OMAP2_ENAWAKEUP |
202 SYSC_OMAP2_SOFTRESET |
203 SYSC_OMAP2_AUTOIDLE)>;
204 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
205 <SYSC_IDLE_NO>,
206 <SYSC_IDLE_SMART>,
207 <SYSC_IDLE_SMART_WKUP>;
208 ti,syss-mask = <1>;
209 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
210 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>;
211 clock-names = "fck";
212 #address-cells = <1>;
213 #size-cells = <1>;
214 ranges = <0x0 0xb000 0x1000>;
216 i2c0: i2c@0 {
217 compatible = "ti,am4372-i2c","ti,omap4-i2c";
218 reg = <0x0 0x1000>;
219 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
220 #address-cells = <1>;
221 #size-cells = <0>;
222 status = "disabled";
223 };
224 };
226 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */
227 compatible = "ti,sysc-omap4", "ti,sysc";
228 ti,hwmods = "adc_tsc";
229 reg = <0xd000 0x4>,
230 <0xd010 0x4>;
231 reg-names = "rev", "sysc";
232 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
233 <SYSC_IDLE_NO>,
234 <SYSC_IDLE_SMART>,
235 <SYSC_IDLE_SMART_WKUP>;
236 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */
237 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>;
238 clock-names = "fck";
239 #address-cells = <1>;
240 #size-cells = <1>;
241 ranges = <0x0 0xd000 0x1000>;
243 tscadc: tscadc@0 {
244 compatible = "ti,am3359-tscadc";
245 reg = <0x0 0x1000>;
246 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
247 clocks = <&adc_tsc_fck>;
248 clock-names = "fck";
249 status = "disabled";
250 dmas = <&edma 53 0>, <&edma 57 0>;
251 dma-names = "fifo0", "fifo1";
253 tsc {
254 compatible = "ti,am3359-tsc";
255 };
257 adc {
258 #io-channel-cells = <1>;
259 compatible = "ti,am3359-adc";
260 };
262 };
263 };
265 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */
266 compatible = "ti,sysc-omap4", "ti,sysc";
267 reg = <0x10000 0x4>;
268 reg-names = "rev";
269 #address-cells = <1>;
270 #size-cells = <1>;
271 ranges = <0x0 0x10000 0x10000>;
273 scm: scm@0 {
274 compatible = "ti,am4-scm", "simple-bus";
275 reg = <0x0 0x4000>;
276 #address-cells = <1>;
277 #size-cells = <1>;
278 ranges = <0 0 0x4000>;
280 am43xx_pinmux: pinmux@800 {
281 compatible = "ti,am437-padconf",
282 "pinctrl-single";
283 reg = <0x800 0x31c>;
284 #address-cells = <1>;
285 #size-cells = <0>;
286 #pinctrl-cells = <1>;
287 #interrupt-cells = <1>;
288 interrupt-controller;
289 pinctrl-single,register-width = <32>;
290 pinctrl-single,function-mask = <0xffffffff>;
291 };
293 scm_conf: scm_conf@0 {
294 compatible = "syscon", "simple-bus";
295 reg = <0x0 0x800>;
296 #address-cells = <1>;
297 #size-cells = <1>;
299 phy_gmii_sel: phy-gmii-sel {
300 compatible = "ti,am43xx-phy-gmii-sel";
301 reg = <0x650 0x4>;
302 #phy-cells = <2>;
303 };
305 scm_clocks: clocks {
306 #address-cells = <1>;
307 #size-cells = <0>;
308 };
309 };
311 wkup_m3_ipc: wkup_m3_ipc@1324 {
312 compatible = "ti,am4372-wkup-m3-ipc";
313 reg = <0x1324 0x44>;
314 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
315 ti,rproc = <&wkup_m3>;
316 mboxes = <&mailbox &mbox_wkupm3>;
317 };
319 edma_xbar: dma-router@f90 {
320 compatible = "ti,am335x-edma-crossbar";
321 reg = <0xf90 0x40>;
322 #dma-cells = <3>;
323 dma-requests = <64>;
324 dma-masters = <&edma>;
325 };
327 scm_clockdomains: clockdomains {
328 };
329 };
330 };
332 target-module@31000 { /* 0x44e31000, ap 24 40.0 */
333 compatible = "ti,sysc-omap2-timer", "ti,sysc";
334 ti,hwmods = "timer1";
335 reg = <0x31000 0x4>,
336 <0x31010 0x4>,
337 <0x31014 0x4>;
338 reg-names = "rev", "sysc", "syss";
339 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
340 SYSC_OMAP2_SOFTRESET |
341 SYSC_OMAP2_AUTOIDLE)>;
342 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
343 <SYSC_IDLE_NO>,
344 <SYSC_IDLE_SMART>;
345 ti,syss-mask = <1>;
346 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
347 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>;
348 clock-names = "fck";
349 #address-cells = <1>;
350 #size-cells = <1>;
351 ranges = <0x0 0x31000 0x1000>;
353 timer1: timer@0 {
354 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
355 reg = <0x0 0x400>;
356 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
357 ti,timer-alwon;
358 clocks = <&timer1_fck>;
359 clock-names = "fck";
360 };
361 };
363 target-module@33000 { /* 0x44e33000, ap 26 18.0 */
364 compatible = "ti,sysc";
365 status = "disabled";
366 #address-cells = <1>;
367 #size-cells = <1>;
368 ranges = <0x0 0x33000 0x1000>;
369 };
371 target-module@35000 { /* 0x44e35000, ap 28 50.0 */
372 compatible = "ti,sysc-omap2", "ti,sysc";
373 reg = <0x35000 0x4>,
374 <0x35010 0x4>,
375 <0x35014 0x4>;
376 reg-names = "rev", "sysc", "syss";
377 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
378 SYSC_OMAP2_SOFTRESET)>;
379 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
380 <SYSC_IDLE_NO>,
381 <SYSC_IDLE_SMART>,
382 <SYSC_IDLE_SMART_WKUP>;
383 ti,syss-mask = <1>;
384 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
385 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
386 clock-names = "fck";
387 #address-cells = <1>;
388 #size-cells = <1>;
389 ranges = <0x0 0x35000 0x1000>;
391 wdt: wdt@0 {
392 compatible = "ti,am4372-wdt","ti,omap3-wdt";
393 reg = <0x0 0x1000>;
394 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
395 };
396 };
398 target-module@37000 { /* 0x44e37000, ap 30 08.0 */
399 compatible = "ti,sysc";
400 status = "disabled";
401 #address-cells = <1>;
402 #size-cells = <1>;
403 ranges = <0x0 0x37000 0x1000>;
404 };
406 target-module@39000 { /* 0x44e39000, ap 32 02.0 */
407 compatible = "ti,sysc";
408 status = "disabled";
409 #address-cells = <1>;
410 #size-cells = <1>;
411 ranges = <0x0 0x39000 0x1000>;
412 };
414 target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */
415 compatible = "ti,sysc-omap4-simple", "ti,sysc";
416 ti,hwmods = "rtc";
417 reg = <0x3e074 0x4>,
418 <0x3e078 0x4>;
419 reg-names = "rev", "sysc";
420 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
421 <SYSC_IDLE_NO>,
422 <SYSC_IDLE_SMART>,
423 <SYSC_IDLE_SMART_WKUP>;
424 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
425 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
426 clock-names = "fck";
427 #address-cells = <1>;
428 #size-cells = <1>;
429 ranges = <0x0 0x3e000 0x1000>;
431 rtc: rtc@0 {
432 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
433 "ti,da830-rtc";
434 reg = <0x0 0x1000>;
435 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
437 clocks = <&clk_32768_ck>;
438 clock-names = "int-clk";
439 system-power-controller;
440 status = "disabled";
441 };
442 };
444 target-module@40000 { /* 0x44e40000, ap 36 68.0 */
445 compatible = "ti,sysc";
446 status = "disabled";
447 #address-cells = <1>;
448 #size-cells = <1>;
449 ranges = <0x0 0x40000 0x40000>;
450 };
452 target-module@86000 { /* 0x44e86000, ap 40 70.0 */
453 compatible = "ti,sysc-omap2", "ti,sysc";
454 ti,hwmods = "counter_32k";
455 reg = <0x86000 0x4>,
456 <0x86004 0x4>;
457 reg-names = "rev", "sysc";
458 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
459 <SYSC_IDLE_NO>;
460 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */
461 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>;
462 clock-names = "fck";
463 #address-cells = <1>;
464 #size-cells = <1>;
465 ranges = <0x0 0x86000 0x1000>;
467 counter32k: counter@0 {
468 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
469 reg = <0x0 0x40>;
470 };
471 };
473 target-module@88000 { /* 0x44e88000, ap 38 12.0 */
474 compatible = "ti,sysc";
475 status = "disabled";
476 #address-cells = <1>;
477 #size-cells = <1>;
478 ranges = <0x00000000 0x00088000 0x00008000>,
479 <0x00008000 0x00090000 0x00001000>,
480 <0x00009000 0x00091000 0x00001000>;
481 };
482 };
483 };
485 &l4_fast { /* 0x4a000000 */
486 compatible = "ti,am4-l4-fast", "simple-bus";
487 reg = <0x4a000000 0x800>,
488 <0x4a000800 0x800>,
489 <0x4a001000 0x400>;
490 reg-names = "ap", "la", "ia0";
491 #address-cells = <1>;
492 #size-cells = <1>;
493 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
495 segment@0 { /* 0x4a000000 */
496 compatible = "simple-bus";
497 #address-cells = <1>;
498 #size-cells = <1>;
499 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
500 <0x00000800 0x00000800 0x000800>, /* ap 1 */
501 <0x00001000 0x00001000 0x000400>, /* ap 2 */
502 <0x00100000 0x00100000 0x008000>, /* ap 3 */
503 <0x00108000 0x00108000 0x001000>, /* ap 4 */
504 <0x00400000 0x00400000 0x002000>, /* ap 5 */
505 <0x00402000 0x00402000 0x001000>, /* ap 6 */
506 <0x00200000 0x00200000 0x080000>, /* ap 7 */
507 <0x00280000 0x00280000 0x001000>; /* ap 8 */
509 target-module@100000 { /* 0x4a100000, ap 3 04.0 */
510 compatible = "ti,sysc-omap4-simple", "ti,sysc";
511 reg = <0x101200 0x4>,
512 <0x101208 0x4>,
513 <0x101204 0x4>;
514 reg-names = "rev", "sysc", "syss";
515 ti,sysc-mask = <0>;
516 ti,sysc-midle = <SYSC_IDLE_FORCE>,
517 <SYSC_IDLE_NO>;
518 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
519 <SYSC_IDLE_NO>;
520 ti,syss-mask = <1>;
521 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
522 clock-names = "fck";
523 #address-cells = <1>;
524 #size-cells = <1>;
525 ranges = <0x0 0x100000 0x8000>;
527 mac: ethernet@0 {
528 compatible = "ti,am4372-cpsw","ti,cpsw";
529 reg = <0x0 0x800
530 0x1200 0x100>;
531 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
532 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
533 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
534 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
535 #address-cells = <1>;
536 #size-cells = <1>;
537 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
538 <&dpll_clksel_mac_clk>;
539 clock-names = "fck", "cpts", "50mclk";
540 assigned-clocks = <&dpll_clksel_mac_clk>;
541 assigned-clock-rates = <50000000>;
542 status = "disabled";
543 cpdma_channels = <8>;
544 ale_entries = <1024>;
545 bd_ram_size = <0x2000>;
546 mac_control = <0x20>;
547 slaves = <2>;
548 active_slave = <0>;
549 cpts_clock_mult = <0x80000000>;
550 cpts_clock_shift = <29>;
551 ranges = <0 0 0x8000>;
552 syscon = <&scm_conf>;
554 davinci_mdio: mdio@1000 {
555 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
556 reg = <0x1000 0x100>;
557 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
558 clock-names = "fck";
559 #address-cells = <1>;
560 #size-cells = <0>;
561 bus_freq = <1000000>;
562 status = "disabled";
563 };
565 cpsw_emac0: slave@200 {
566 /* Filled in by U-Boot */
567 mac-address = [ 00 00 00 00 00 00 ];
568 phys = <&phy_gmii_sel 1 0>;
569 };
571 cpsw_emac1: slave@300 {
572 /* Filled in by U-Boot */
573 mac-address = [ 00 00 00 00 00 00 ];
574 phys = <&phy_gmii_sel 2 0>;
575 };
576 };
577 };
579 target-module@200000 { /* 0x4a200000, ap 7 02.0 */
580 compatible = "ti,sysc";
581 status = "disabled";
582 #address-cells = <1>;
583 #size-cells = <1>;
584 ranges = <0x0 0x200000 0x80000>;
585 };
587 target-module@400000 { /* 0x4a400000, ap 5 08.0 */
588 compatible = "ti,sysc";
589 status = "disabled";
590 #address-cells = <1>;
591 #size-cells = <1>;
592 ranges = <0x0 0x400000 0x2000>;
593 };
594 };
595 };
597 &l4_per { /* 0x48000000 */
598 compatible = "ti,am4-l4-per", "simple-bus";
599 reg = <0x48000000 0x800>,
600 <0x48000800 0x800>,
601 <0x48001000 0x400>,
602 <0x48001400 0x400>,
603 <0x48001800 0x400>,
604 <0x48001c00 0x400>;
605 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
606 #address-cells = <1>;
607 #size-cells = <1>;
608 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */
609 <0x00100000 0x48100000 0x100000>, /* segment 1 */
610 <0x00200000 0x48200000 0x100000>, /* segment 2 */
611 <0x00300000 0x48300000 0x100000>, /* segment 3 */
612 <0x46000000 0x46000000 0x400000>, /* l3 data port */
613 <0x46400000 0x46400000 0x400000>; /* l3 data port */
615 segment@0 { /* 0x48000000 */
616 compatible = "simple-bus";
617 #address-cells = <1>;
618 #size-cells = <1>;
619 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
620 <0x00000800 0x00000800 0x000800>, /* ap 1 */
621 <0x00001000 0x00001000 0x000400>, /* ap 2 */
622 <0x00001400 0x00001400 0x000400>, /* ap 3 */
623 <0x00001800 0x00001800 0x000400>, /* ap 4 */
624 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */
625 <0x00008000 0x00008000 0x001000>, /* ap 6 */
626 <0x00009000 0x00009000 0x001000>, /* ap 7 */
627 <0x00022000 0x00022000 0x001000>, /* ap 8 */
628 <0x00023000 0x00023000 0x001000>, /* ap 9 */
629 <0x00024000 0x00024000 0x001000>, /* ap 10 */
630 <0x00025000 0x00025000 0x001000>, /* ap 11 */
631 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */
632 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */
633 <0x00038000 0x00038000 0x002000>, /* ap 14 */
634 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */
635 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */
636 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */
637 <0x00040000 0x00040000 0x001000>, /* ap 18 */
638 <0x00041000 0x00041000 0x001000>, /* ap 19 */
639 <0x00042000 0x00042000 0x001000>, /* ap 20 */
640 <0x00043000 0x00043000 0x001000>, /* ap 21 */
641 <0x00044000 0x00044000 0x001000>, /* ap 22 */
642 <0x00045000 0x00045000 0x001000>, /* ap 23 */
643 <0x00046000 0x00046000 0x001000>, /* ap 24 */
644 <0x00047000 0x00047000 0x001000>, /* ap 25 */
645 <0x00048000 0x00048000 0x001000>, /* ap 26 */
646 <0x00049000 0x00049000 0x001000>, /* ap 27 */
647 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */
648 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */
649 <0x00060000 0x00060000 0x001000>, /* ap 30 */
650 <0x00061000 0x00061000 0x001000>, /* ap 31 */
651 <0x00080000 0x00080000 0x010000>, /* ap 32 */
652 <0x00090000 0x00090000 0x001000>, /* ap 33 */
653 <0x00030000 0x00030000 0x001000>, /* ap 65 */
654 <0x00031000 0x00031000 0x001000>, /* ap 66 */
655 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */
656 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */
657 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */
658 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */
659 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */
660 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */
661 <0x00034000 0x00034000 0x001000>, /* ap 80 */
662 <0x00035000 0x00035000 0x001000>, /* ap 81 */
663 <0x00036000 0x00036000 0x001000>, /* ap 84 */
664 <0x00037000 0x00037000 0x001000>, /* ap 85 */
665 <0x46000000 0x46000000 0x400000>, /* l3 data port */
666 <0x46400000 0x46400000 0x400000>; /* l3 data port */
668 target-module@8000 { /* 0x48008000, ap 6 10.0 */
669 compatible = "ti,sysc";
670 status = "disabled";
671 #address-cells = <1>;
672 #size-cells = <1>;
673 ranges = <0x0 0x8000 0x1000>;
674 };
676 target-module@22000 { /* 0x48022000, ap 8 0a.0 */
677 compatible = "ti,sysc-omap2", "ti,sysc";
678 reg = <0x22050 0x4>,
679 <0x22054 0x4>,
680 <0x22058 0x4>;
681 reg-names = "rev", "sysc", "syss";
682 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
683 SYSC_OMAP2_SOFTRESET |
684 SYSC_OMAP2_AUTOIDLE)>;
685 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
686 <SYSC_IDLE_NO>,
687 <SYSC_IDLE_SMART>,
688 <SYSC_IDLE_SMART_WKUP>;
689 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
690 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>;
691 clock-names = "fck";
692 #address-cells = <1>;
693 #size-cells = <1>;
694 ranges = <0x0 0x22000 0x1000>;
696 uart1: serial@0 {
697 compatible = "ti,am4372-uart","ti,omap2-uart";
698 reg = <0x0 0x2000>;
699 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
700 status = "disabled";
701 };
702 };
704 target-module@24000 { /* 0x48024000, ap 10 1c.0 */
705 compatible = "ti,sysc-omap2", "ti,sysc";
706 reg = <0x24050 0x4>,
707 <0x24054 0x4>,
708 <0x24058 0x4>;
709 reg-names = "rev", "sysc", "syss";
710 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
711 SYSC_OMAP2_SOFTRESET |
712 SYSC_OMAP2_AUTOIDLE)>;
713 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
714 <SYSC_IDLE_NO>,
715 <SYSC_IDLE_SMART>,
716 <SYSC_IDLE_SMART_WKUP>;
717 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
718 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>;
719 clock-names = "fck";
720 #address-cells = <1>;
721 #size-cells = <1>;
722 ranges = <0x0 0x24000 0x1000>;
724 uart2: serial@0 {
725 compatible = "ti,am4372-uart","ti,omap2-uart";
726 reg = <0x0 0x2000>;
727 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
728 status = "disabled";
729 };
730 };
732 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */
733 compatible = "ti,sysc-omap2", "ti,sysc";
734 reg = <0x2a000 0x8>,
735 <0x2a010 0x8>,
736 <0x2a090 0x8>;
737 reg-names = "rev", "sysc", "syss";
738 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
739 SYSC_OMAP2_ENAWAKEUP |
740 SYSC_OMAP2_SOFTRESET |
741 SYSC_OMAP2_AUTOIDLE)>;
742 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
743 <SYSC_IDLE_NO>,
744 <SYSC_IDLE_SMART>,
745 <SYSC_IDLE_SMART_WKUP>;
746 ti,syss-mask = <1>;
747 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
748 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>;
749 clock-names = "fck";
750 #address-cells = <1>;
751 #size-cells = <1>;
752 ranges = <0x0 0x2a000 0x1000>;
754 i2c1: i2c@0 {
755 compatible = "ti,am4372-i2c","ti,omap4-i2c";
756 reg = <0x0 0x1000>;
757 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
758 #address-cells = <1>;
759 #size-cells = <0>;
760 status = "disabled";
761 };
762 };
764 target-module@30000 { /* 0x48030000, ap 65 08.0 */
765 compatible = "ti,sysc-omap2", "ti,sysc";
766 ti,hwmods = "spi0";
767 reg = <0x30000 0x4>,
768 <0x30110 0x4>,
769 <0x30114 0x4>;
770 reg-names = "rev", "sysc", "syss";
771 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
772 SYSC_OMAP2_SOFTRESET |
773 SYSC_OMAP2_AUTOIDLE)>;
774 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
775 <SYSC_IDLE_NO>,
776 <SYSC_IDLE_SMART>;
777 ti,syss-mask = <1>;
778 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
779 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>;
780 clock-names = "fck";
781 #address-cells = <1>;
782 #size-cells = <1>;
783 ranges = <0x0 0x30000 0x1000>;
785 spi0: spi@0 {
786 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
787 reg = <0x0 0x400>;
788 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
789 #address-cells = <1>;
790 #size-cells = <0>;
791 status = "disabled";
792 };
793 };
795 target-module@34000 { /* 0x48034000, ap 80 56.0 */
796 compatible = "ti,sysc";
797 status = "disabled";
798 #address-cells = <1>;
799 #size-cells = <1>;
800 ranges = <0x0 0x34000 0x1000>;
801 };
803 target-module@36000 { /* 0x48036000, ap 84 3e.0 */
804 compatible = "ti,sysc";
805 status = "disabled";
806 #address-cells = <1>;
807 #size-cells = <1>;
808 ranges = <0x0 0x36000 0x1000>;
809 };
811 target-module@38000 { /* 0x48038000, ap 14 04.0 */
812 compatible = "ti,sysc-omap4-simple", "ti,sysc";
813 reg = <0x38000 0x4>,
814 <0x38004 0x4>;
815 reg-names = "rev", "sysc";
816 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
817 <SYSC_IDLE_NO>,
818 <SYSC_IDLE_SMART>;
819 /* Domains (P, C): per_pwrdm, l3s_clkdm */
820 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>;
821 clock-names = "fck";
822 #address-cells = <1>;
823 #size-cells = <1>;
824 ranges = <0x0 0x38000 0x2000>,
825 <0x46000000 0x46000000 0x400000>;
827 mcasp0: mcasp@0 {
828 compatible = "ti,am33xx-mcasp-audio";
829 reg = <0x0 0x2000>,
830 <0x46000000 0x400000>;
831 reg-names = "mpu", "dat";
832 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
833 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
834 interrupt-names = "tx", "rx";
835 status = "disabled";
836 dmas = <&edma 8 2>,
837 <&edma 9 2>;
838 dma-names = "tx", "rx";
839 };
840 };
842 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */
843 compatible = "ti,sysc-omap4-simple", "ti,sysc";
844 reg = <0x3c000 0x4>,
845 <0x3c004 0x4>;
846 reg-names = "rev", "sysc";
847 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
848 <SYSC_IDLE_NO>,
849 <SYSC_IDLE_SMART>;
850 /* Domains (P, C): per_pwrdm, l3s_clkdm */
851 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>;
852 clock-names = "fck";
853 #address-cells = <1>;
854 #size-cells = <1>;
855 ranges = <0x0 0x3c000 0x2000>,
856 <0x46400000 0x46400000 0x400000>;
858 mcasp1: mcasp@0 {
859 compatible = "ti,am33xx-mcasp-audio";
860 reg = <0x0 0x2000>,
861 <0x46400000 0x400000>;
862 reg-names = "mpu", "dat";
863 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
865 interrupt-names = "tx", "rx";
866 status = "disabled";
867 dmas = <&edma 10 2>,
868 <&edma 11 2>;
869 dma-names = "tx", "rx";
870 };
871 };
873 target-module@40000 { /* 0x48040000, ap 18 1e.0 */
874 compatible = "ti,sysc-omap4-timer", "ti,sysc";
875 ti,hwmods = "timer2";
876 reg = <0x40000 0x4>,
877 <0x40010 0x4>,
878 <0x40014 0x4>;
879 reg-names = "rev", "sysc", "syss";
880 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
881 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
882 <SYSC_IDLE_NO>,
883 <SYSC_IDLE_SMART>,
884 <SYSC_IDLE_SMART_WKUP>;
885 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
886 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>;
887 clock-names = "fck";
888 #address-cells = <1>;
889 #size-cells = <1>;
890 ranges = <0x0 0x40000 0x1000>;
892 timer2: timer@0 {
893 compatible = "ti,am4372-timer","ti,am335x-timer";
894 reg = <0x0 0x400>;
895 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
896 clocks = <&timer2_fck>;
897 clock-names = "fck";
898 };
899 };
901 target-module@42000 { /* 0x48042000, ap 20 24.0 */
902 compatible = "ti,sysc-omap4-timer", "ti,sysc";
903 ti,hwmods = "timer3";
904 reg = <0x42000 0x4>,
905 <0x42010 0x4>,
906 <0x42014 0x4>;
907 reg-names = "rev", "sysc", "syss";
908 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
909 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
910 <SYSC_IDLE_NO>,
911 <SYSC_IDLE_SMART>,
912 <SYSC_IDLE_SMART_WKUP>;
913 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
914 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>;
915 clock-names = "fck";
916 #address-cells = <1>;
917 #size-cells = <1>;
918 ranges = <0x0 0x42000 0x1000>;
920 timer3: timer@0 {
921 compatible = "ti,am4372-timer","ti,am335x-timer";
922 reg = <0x0 0x400>;
923 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
924 status = "disabled";
925 };
926 };
928 target-module@44000 { /* 0x48044000, ap 22 26.0 */
929 compatible = "ti,sysc-omap4-timer", "ti,sysc";
930 ti,hwmods = "timer4";
931 reg = <0x44000 0x4>,
932 <0x44010 0x4>,
933 <0x44014 0x4>;
934 reg-names = "rev", "sysc", "syss";
935 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
936 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
937 <SYSC_IDLE_NO>,
938 <SYSC_IDLE_SMART>,
939 <SYSC_IDLE_SMART_WKUP>;
940 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
941 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>;
942 clock-names = "fck";
943 #address-cells = <1>;
944 #size-cells = <1>;
945 ranges = <0x0 0x44000 0x1000>;
947 timer4: timer@0 {
948 compatible = "ti,am4372-timer","ti,am335x-timer";
949 reg = <0x0 0x400>;
950 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
951 ti,timer-pwm;
952 status = "disabled";
953 };
954 };
956 target-module@46000 { /* 0x48046000, ap 24 28.0 */
957 compatible = "ti,sysc-omap4-timer", "ti,sysc";
958 ti,hwmods = "timer5";
959 reg = <0x46000 0x4>,
960 <0x46010 0x4>,
961 <0x46014 0x4>;
962 reg-names = "rev", "sysc", "syss";
963 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
964 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
965 <SYSC_IDLE_NO>,
966 <SYSC_IDLE_SMART>,
967 <SYSC_IDLE_SMART_WKUP>;
968 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
969 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>;
970 clock-names = "fck";
971 #address-cells = <1>;
972 #size-cells = <1>;
973 ranges = <0x0 0x46000 0x1000>;
975 timer5: timer@0 {
976 compatible = "ti,am4372-timer","ti,am335x-timer";
977 reg = <0x0 0x400>;
978 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
979 ti,timer-pwm;
980 status = "disabled";
981 };
982 };
984 target-module@48000 { /* 0x48048000, ap 26 1a.0 */
985 compatible = "ti,sysc-omap4-timer", "ti,sysc";
986 ti,hwmods = "timer6";
987 reg = <0x48000 0x4>,
988 <0x48010 0x4>,
989 <0x48014 0x4>;
990 reg-names = "rev", "sysc", "syss";
991 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
992 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
993 <SYSC_IDLE_NO>,
994 <SYSC_IDLE_SMART>,
995 <SYSC_IDLE_SMART_WKUP>;
996 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
997 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>;
998 clock-names = "fck";
999 #address-cells = <1>;
1000 #size-cells = <1>;
1001 ranges = <0x0 0x48000 0x1000>;
1003 timer6: timer@0 {
1004 compatible = "ti,am4372-timer","ti,am335x-timer";
1005 reg = <0x0 0x400>;
1006 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1007 ti,timer-pwm;
1008 status = "disabled";
1009 };
1010 };
1012 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */
1013 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1014 ti,hwmods = "timer7";
1015 reg = <0x4a000 0x4>,
1016 <0x4a010 0x4>,
1017 <0x4a014 0x4>;
1018 reg-names = "rev", "sysc", "syss";
1019 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1020 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1021 <SYSC_IDLE_NO>,
1022 <SYSC_IDLE_SMART>,
1023 <SYSC_IDLE_SMART_WKUP>;
1024 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1025 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>;
1026 clock-names = "fck";
1027 #address-cells = <1>;
1028 #size-cells = <1>;
1029 ranges = <0x0 0x4a000 0x1000>;
1031 timer7: timer@0 {
1032 compatible = "ti,am4372-timer","ti,am335x-timer";
1033 reg = <0x0 0x400>;
1034 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1035 ti,timer-pwm;
1036 status = "disabled";
1037 };
1038 };
1040 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */
1041 compatible = "ti,sysc-omap2", "ti,sysc";
1042 reg = <0x4c000 0x4>,
1043 <0x4c010 0x4>,
1044 <0x4c114 0x4>;
1045 reg-names = "rev", "sysc", "syss";
1046 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1047 SYSC_OMAP2_SOFTRESET |
1048 SYSC_OMAP2_AUTOIDLE)>;
1049 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1050 <SYSC_IDLE_NO>,
1051 <SYSC_IDLE_SMART>,
1052 <SYSC_IDLE_SMART_WKUP>;
1053 ti,syss-mask = <1>;
1054 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1055 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>,
1056 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>;
1057 clock-names = "fck", "dbclk";
1058 #address-cells = <1>;
1059 #size-cells = <1>;
1060 ranges = <0x0 0x4c000 0x1000>;
1062 gpio1: gpio@0 {
1063 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1064 reg = <0x0 0x1000>;
1065 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1066 gpio-controller;
1067 #gpio-cells = <2>;
1068 interrupt-controller;
1069 #interrupt-cells = <2>;
1070 status = "disabled";
1071 };
1072 };
1074 target-module@60000 { /* 0x48060000, ap 30 14.0 */
1075 compatible = "ti,sysc-omap2", "ti,sysc";
1076 reg = <0x602fc 0x4>,
1077 <0x60110 0x4>,
1078 <0x60114 0x4>;
1079 reg-names = "rev", "sysc", "syss";
1080 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1081 SYSC_OMAP2_ENAWAKEUP |
1082 SYSC_OMAP2_SOFTRESET |
1083 SYSC_OMAP2_AUTOIDLE)>;
1084 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1085 <SYSC_IDLE_NO>,
1086 <SYSC_IDLE_SMART>;
1087 ti,syss-mask = <1>;
1088 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1089 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>;
1090 clock-names = "fck";
1091 #address-cells = <1>;
1092 #size-cells = <1>;
1093 ranges = <0x0 0x60000 0x1000>;
1095 mmc1: mmc@0 {
1096 compatible = "ti,omap4-hsmmc";
1097 reg = <0x0 0x1000>;
1098 ti,dual-volt;
1099 ti,needs-special-reset;
1100 dmas = <&edma 24 0>,
1101 <&edma 25 0>;
1102 dma-names = "tx", "rx";
1103 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1104 status = "disabled";
1105 };
1106 };
1108 target-module@80000 { /* 0x48080000, ap 32 18.0 */
1109 compatible = "ti,sysc-omap2", "ti,sysc";
1110 ti,hwmods = "elm";
1111 reg = <0x80000 0x4>,
1112 <0x80010 0x4>,
1113 <0x80014 0x4>;
1114 reg-names = "rev", "sysc", "syss";
1115 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1116 SYSC_OMAP2_SOFTRESET |
1117 SYSC_OMAP2_AUTOIDLE)>;
1118 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1119 <SYSC_IDLE_NO>,
1120 <SYSC_IDLE_SMART>;
1121 ti,syss-mask = <1>;
1122 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1123 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>;
1124 clock-names = "fck";
1125 #address-cells = <1>;
1126 #size-cells = <1>;
1127 ranges = <0x0 0x80000 0x10000>;
1129 elm: elm@0 {
1130 compatible = "ti,am3352-elm";
1131 reg = <0x0 0x2000>;
1132 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1133 clocks = <&l4ls_gclk>;
1134 clock-names = "fck";
1135 status = "disabled";
1136 };
1137 };
1139 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */
1140 compatible = "ti,sysc-omap4", "ti,sysc";
1141 reg = <0xc8000 0x4>,
1142 <0xc8010 0x4>;
1143 reg-names = "rev", "sysc";
1144 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1145 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1146 <SYSC_IDLE_NO>,
1147 <SYSC_IDLE_SMART>;
1148 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1149 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>;
1150 clock-names = "fck";
1151 #address-cells = <1>;
1152 #size-cells = <1>;
1153 ranges = <0x0 0xc8000 0x1000>;
1155 mailbox: mailbox@0 {
1156 compatible = "ti,omap4-mailbox";
1157 reg = <0x0 0x200>;
1158 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1159 #mbox-cells = <1>;
1160 ti,mbox-num-users = <4>;
1161 ti,mbox-num-fifos = <8>;
1162 mbox_wkupm3: wkup_m3 {
1163 ti,mbox-send-noirq;
1164 ti,mbox-tx = <0 0 0>;
1165 ti,mbox-rx = <0 0 3>;
1166 };
1167 };
1168 };
1170 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */
1171 compatible = "ti,sysc-omap2", "ti,sysc";
1172 ti,hwmods = "spinlock";
1173 reg = <0xca000 0x4>,
1174 <0xca010 0x4>,
1175 <0xca014 0x4>;
1176 reg-names = "rev", "sysc", "syss";
1177 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1178 SYSC_OMAP2_ENAWAKEUP |
1179 SYSC_OMAP2_SOFTRESET |
1180 SYSC_OMAP2_AUTOIDLE)>;
1181 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1182 <SYSC_IDLE_NO>,
1183 <SYSC_IDLE_SMART>;
1184 ti,syss-mask = <1>;
1185 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1186 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>;
1187 clock-names = "fck";
1188 #address-cells = <1>;
1189 #size-cells = <1>;
1190 ranges = <0x0 0xca000 0x1000>;
1192 hwspinlock: spinlock@0 {
1193 compatible = "ti,omap4-hwspinlock";
1194 reg = <0x0 0x1000>;
1195 #hwlock-cells = <1>;
1196 };
1197 };
1198 };
1200 segment@100000 { /* 0x48100000 */
1201 compatible = "simple-bus";
1202 #address-cells = <1>;
1203 #size-cells = <1>;
1204 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */
1205 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */
1206 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */
1207 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */
1208 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */
1209 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */
1210 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */
1211 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */
1212 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */
1213 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */
1214 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */
1215 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */
1216 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */
1217 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */
1218 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */
1219 <0x000af000 0x001af000 0x001000>, /* ap 49 */
1220 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */
1221 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */
1222 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */
1223 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */
1224 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */
1225 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */
1226 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */
1227 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */
1228 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */
1229 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */
1230 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */
1231 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */
1232 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */
1233 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */
1235 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */
1236 compatible = "ti,sysc";
1237 status = "disabled";
1238 #address-cells = <1>;
1239 #size-cells = <1>;
1240 ranges = <0x0 0x8c000 0x1000>;
1241 };
1243 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */
1244 compatible = "ti,sysc";
1245 status = "disabled";
1246 #address-cells = <1>;
1247 #size-cells = <1>;
1248 ranges = <0x0 0x8e000 0x1000>;
1249 };
1251 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */
1252 compatible = "ti,sysc-omap2", "ti,sysc";
1253 reg = <0x9c000 0x8>,
1254 <0x9c010 0x8>,
1255 <0x9c090 0x8>;
1256 reg-names = "rev", "sysc", "syss";
1257 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1258 SYSC_OMAP2_ENAWAKEUP |
1259 SYSC_OMAP2_SOFTRESET |
1260 SYSC_OMAP2_AUTOIDLE)>;
1261 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1262 <SYSC_IDLE_NO>,
1263 <SYSC_IDLE_SMART>,
1264 <SYSC_IDLE_SMART_WKUP>;
1265 ti,syss-mask = <1>;
1266 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1267 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>;
1268 clock-names = "fck";
1269 #address-cells = <1>;
1270 #size-cells = <1>;
1271 ranges = <0x0 0x9c000 0x1000>;
1273 i2c2: i2c@0 {
1274 compatible = "ti,am4372-i2c","ti,omap4-i2c";
1275 reg = <0x0 0x1000>;
1276 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1277 #address-cells = <1>;
1278 #size-cells = <0>;
1279 status = "disabled";
1280 };
1281 };
1283 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */
1284 compatible = "ti,sysc-omap2", "ti,sysc";
1285 ti,hwmods = "spi1";
1286 reg = <0xa0000 0x4>,
1287 <0xa0110 0x4>,
1288 <0xa0114 0x4>;
1289 reg-names = "rev", "sysc", "syss";
1290 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1291 SYSC_OMAP2_SOFTRESET |
1292 SYSC_OMAP2_AUTOIDLE)>;
1293 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1294 <SYSC_IDLE_NO>,
1295 <SYSC_IDLE_SMART>;
1296 ti,syss-mask = <1>;
1297 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1298 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>;
1299 clock-names = "fck";
1300 #address-cells = <1>;
1301 #size-cells = <1>;
1302 ranges = <0x0 0xa0000 0x1000>;
1304 spi1: spi@0 {
1305 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1306 reg = <0x0 0x400>;
1307 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1308 #address-cells = <1>;
1309 #size-cells = <0>;
1310 status = "disabled";
1311 };
1312 };
1314 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */
1315 compatible = "ti,sysc-omap2", "ti,sysc";
1316 ti,hwmods = "spi2";
1317 reg = <0xa2000 0x4>,
1318 <0xa2110 0x4>,
1319 <0xa2114 0x4>;
1320 reg-names = "rev", "sysc", "syss";
1321 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1322 SYSC_OMAP2_SOFTRESET |
1323 SYSC_OMAP2_AUTOIDLE)>;
1324 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1325 <SYSC_IDLE_NO>,
1326 <SYSC_IDLE_SMART>;
1327 ti,syss-mask = <1>;
1328 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1329 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>;
1330 clock-names = "fck";
1331 #address-cells = <1>;
1332 #size-cells = <1>;
1333 ranges = <0x0 0xa2000 0x1000>;
1335 spi2: spi@0 {
1336 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1337 reg = <0x0 0x400>;
1338 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1339 #address-cells = <1>;
1340 #size-cells = <0>;
1341 status = "disabled";
1342 };
1343 };
1345 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */
1346 compatible = "ti,sysc-omap2", "ti,sysc";
1347 ti,hwmods = "spi3";
1348 reg = <0xa4000 0x4>,
1349 <0xa4110 0x4>,
1350 <0xa4114 0x4>;
1351 reg-names = "rev", "sysc", "syss";
1352 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1353 SYSC_OMAP2_SOFTRESET |
1354 SYSC_OMAP2_AUTOIDLE)>;
1355 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1356 <SYSC_IDLE_NO>,
1357 <SYSC_IDLE_SMART>;
1358 ti,syss-mask = <1>;
1359 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1360 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>;
1361 clock-names = "fck";
1362 #address-cells = <1>;
1363 #size-cells = <1>;
1364 ranges = <0x0 0xa4000 0x1000>;
1366 spi3: spi@0 {
1367 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1368 reg = <0x0 0x400>;
1369 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1370 #address-cells = <1>;
1371 #size-cells = <0>;
1372 status = "disabled";
1373 };
1374 };
1376 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */
1377 compatible = "ti,sysc-omap2", "ti,sysc";
1378 reg = <0xa6050 0x4>,
1379 <0xa6054 0x4>,
1380 <0xa6058 0x4>;
1381 reg-names = "rev", "sysc", "syss";
1382 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1383 SYSC_OMAP2_SOFTRESET |
1384 SYSC_OMAP2_AUTOIDLE)>;
1385 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1386 <SYSC_IDLE_NO>,
1387 <SYSC_IDLE_SMART>,
1388 <SYSC_IDLE_SMART_WKUP>;
1389 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1390 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>;
1391 clock-names = "fck";
1392 #address-cells = <1>;
1393 #size-cells = <1>;
1394 ranges = <0x0 0xa6000 0x1000>;
1396 uart3: serial@0 {
1397 compatible = "ti,am4372-uart","ti,omap2-uart";
1398 reg = <0x0 0x2000>;
1399 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1400 status = "disabled";
1401 };
1402 };
1404 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */
1405 compatible = "ti,sysc-omap2", "ti,sysc";
1406 reg = <0xa8050 0x4>,
1407 <0xa8054 0x4>,
1408 <0xa8058 0x4>;
1409 reg-names = "rev", "sysc", "syss";
1410 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1411 SYSC_OMAP2_SOFTRESET |
1412 SYSC_OMAP2_AUTOIDLE)>;
1413 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1414 <SYSC_IDLE_NO>,
1415 <SYSC_IDLE_SMART>,
1416 <SYSC_IDLE_SMART_WKUP>;
1417 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1418 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>;
1419 clock-names = "fck";
1420 #address-cells = <1>;
1421 #size-cells = <1>;
1422 ranges = <0x0 0xa8000 0x1000>;
1424 uart4: serial@0 {
1425 compatible = "ti,am4372-uart","ti,omap2-uart";
1426 reg = <0x0 0x2000>;
1427 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1428 status = "disabled";
1429 };
1430 };
1432 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */
1433 compatible = "ti,sysc-omap2", "ti,sysc";
1434 reg = <0xaa050 0x4>,
1435 <0xaa054 0x4>,
1436 <0xaa058 0x4>;
1437 reg-names = "rev", "sysc", "syss";
1438 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1439 SYSC_OMAP2_SOFTRESET |
1440 SYSC_OMAP2_AUTOIDLE)>;
1441 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1442 <SYSC_IDLE_NO>,
1443 <SYSC_IDLE_SMART>,
1444 <SYSC_IDLE_SMART_WKUP>;
1445 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1446 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>;
1447 clock-names = "fck";
1448 #address-cells = <1>;
1449 #size-cells = <1>;
1450 ranges = <0x0 0xaa000 0x1000>;
1452 uart5: serial@0 {
1453 compatible = "ti,am4372-uart","ti,omap2-uart";
1454 reg = <0x0 0x2000>;
1455 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1456 status = "disabled";
1457 };
1458 };
1460 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */
1461 compatible = "ti,sysc-omap2", "ti,sysc";
1462 reg = <0xac000 0x4>,
1463 <0xac010 0x4>,
1464 <0xac114 0x4>;
1465 reg-names = "rev", "sysc", "syss";
1466 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1467 SYSC_OMAP2_SOFTRESET |
1468 SYSC_OMAP2_AUTOIDLE)>;
1469 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1470 <SYSC_IDLE_NO>,
1471 <SYSC_IDLE_SMART>,
1472 <SYSC_IDLE_SMART_WKUP>;
1473 ti,syss-mask = <1>;
1474 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1475 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>,
1476 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>;
1477 clock-names = "fck", "dbclk";
1478 #address-cells = <1>;
1479 #size-cells = <1>;
1480 ranges = <0x0 0xac000 0x1000>;
1482 gpio2: gpio@0 {
1483 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1484 reg = <0x0 0x1000>;
1485 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1486 gpio-controller;
1487 #gpio-cells = <2>;
1488 interrupt-controller;
1489 #interrupt-cells = <2>;
1490 status = "disabled";
1491 };
1492 };
1494 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */
1495 compatible = "ti,sysc-omap2", "ti,sysc";
1496 reg = <0xae000 0x4>,
1497 <0xae010 0x4>,
1498 <0xae114 0x4>;
1499 reg-names = "rev", "sysc", "syss";
1500 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1501 SYSC_OMAP2_SOFTRESET |
1502 SYSC_OMAP2_AUTOIDLE)>;
1503 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1504 <SYSC_IDLE_NO>,
1505 <SYSC_IDLE_SMART>,
1506 <SYSC_IDLE_SMART_WKUP>;
1507 ti,syss-mask = <1>;
1508 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1509 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>,
1510 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>;
1511 clock-names = "fck", "dbclk";
1512 #address-cells = <1>;
1513 #size-cells = <1>;
1514 ranges = <0x0 0xae000 0x1000>;
1516 gpio3: gpio@0 {
1517 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1518 reg = <0x0 0x1000>;
1519 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1520 gpio-controller;
1521 #gpio-cells = <2>;
1522 interrupt-controller;
1523 #interrupt-cells = <2>;
1524 status = "disabled";
1525 };
1526 };
1528 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */
1529 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1530 ti,hwmods = "timer8";
1531 reg = <0xc1000 0x4>,
1532 <0xc1010 0x4>,
1533 <0xc1014 0x4>;
1534 reg-names = "rev", "sysc", "syss";
1535 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1536 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1537 <SYSC_IDLE_NO>,
1538 <SYSC_IDLE_SMART>,
1539 <SYSC_IDLE_SMART_WKUP>;
1540 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1541 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>;
1542 clock-names = "fck";
1543 #address-cells = <1>;
1544 #size-cells = <1>;
1545 ranges = <0x0 0xc1000 0x1000>;
1547 timer8: timer@0 {
1548 compatible = "ti,am4372-timer","ti,am335x-timer";
1549 reg = <0x0 0x400>;
1550 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
1551 status = "disabled";
1552 };
1553 };
1555 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
1556 compatible = "ti,sysc-omap4", "ti,sysc";
1557 reg = <0xcc020 0x4>;
1558 reg-names = "rev";
1559 ti,hwmods = "d_can0";
1560 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1561 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
1562 clock-names = "fck";
1563 #address-cells = <1>;
1564 #size-cells = <1>;
1565 ranges = <0x0 0xcc000 0x2000>;
1567 dcan0: can@0 {
1568 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1569 reg = <0x0 0x2000>;
1570 syscon-raminit = <&scm_conf 0x644 0>;
1571 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1572 status = "disabled";
1573 };
1574 };
1576 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
1577 compatible = "ti,sysc-omap4", "ti,sysc";
1578 reg = <0xd0020 0x4>;
1579 reg-names = "rev";
1580 ti,hwmods = "d_can1";
1581 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1582 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;
1583 clock-names = "fck";
1584 #address-cells = <1>;
1585 #size-cells = <1>;
1586 ranges = <0x0 0xd0000 0x2000>;
1588 dcan1: can@0 {
1589 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1590 reg = <0x0 0x2000>;
1591 syscon-raminit = <&scm_conf 0x644 1>;
1592 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1593 status = "disabled";
1594 };
1595 };
1597 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */
1598 compatible = "ti,sysc-omap2", "ti,sysc";
1599 reg = <0xd82fc 0x4>,
1600 <0xd8110 0x4>,
1601 <0xd8114 0x4>;
1602 reg-names = "rev", "sysc", "syss";
1603 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1604 SYSC_OMAP2_ENAWAKEUP |
1605 SYSC_OMAP2_SOFTRESET |
1606 SYSC_OMAP2_AUTOIDLE)>;
1607 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1608 <SYSC_IDLE_NO>,
1609 <SYSC_IDLE_SMART>;
1610 ti,syss-mask = <1>;
1611 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1612 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>;
1613 clock-names = "fck";
1614 #address-cells = <1>;
1615 #size-cells = <1>;
1616 ranges = <0x0 0xd8000 0x1000>;
1618 mmc2: mmc@0 {
1619 compatible = "ti,omap4-hsmmc";
1620 reg = <0x0 0x1000>;
1621 ti,needs-special-reset;
1622 dmas = <&edma 2 0>,
1623 <&edma 3 0>;
1624 dma-names = "tx", "rx";
1625 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1626 status = "disabled";
1627 };
1628 };
1629 };
1631 segment@200000 { /* 0x48200000 */
1632 compatible = "simple-bus";
1633 #address-cells = <1>;
1634 #size-cells = <1>;
1635 };
1637 segment@300000 { /* 0x48300000 */
1638 compatible = "simple-bus";
1639 #address-cells = <1>;
1640 #size-cells = <1>;
1641 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */
1642 <0x00001000 0x00301000 0x001000>, /* ap 57 */
1643 <0x00002000 0x00302000 0x001000>, /* ap 58 */
1644 <0x00003000 0x00303000 0x001000>, /* ap 59 */
1645 <0x00004000 0x00304000 0x001000>, /* ap 60 */
1646 <0x00005000 0x00305000 0x001000>, /* ap 61 */
1647 <0x00018000 0x00318000 0x004000>, /* ap 62 */
1648 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */
1649 <0x00010000 0x00310000 0x002000>, /* ap 64 */
1650 <0x00028000 0x00328000 0x001000>, /* ap 75 */
1651 <0x00029000 0x00329000 0x001000>, /* ap 76 */
1652 <0x00012000 0x00312000 0x001000>, /* ap 79 */
1653 <0x00020000 0x00320000 0x001000>, /* ap 82 */
1654 <0x00021000 0x00321000 0x001000>, /* ap 83 */
1655 <0x00026000 0x00326000 0x001000>, /* ap 86 */
1656 <0x00027000 0x00327000 0x001000>, /* ap 87 */
1657 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */
1658 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */
1659 <0x00013000 0x00313000 0x001000>, /* ap 90 */
1660 <0x00014000 0x00314000 0x001000>, /* ap 91 */
1661 <0x00006000 0x00306000 0x001000>, /* ap 96 */
1662 <0x00007000 0x00307000 0x001000>, /* ap 97 */
1663 <0x00008000 0x00308000 0x001000>, /* ap 98 */
1664 <0x00009000 0x00309000 0x001000>, /* ap 99 */
1665 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */
1666 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */
1667 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */
1668 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */
1669 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */
1670 <0x00040000 0x00340000 0x001000>, /* ap 105 */
1671 <0x00041000 0x00341000 0x001000>, /* ap 106 */
1672 <0x00042000 0x00342000 0x001000>, /* ap 107 */
1673 <0x00045000 0x00345000 0x001000>, /* ap 108 */
1674 <0x00046000 0x00346000 0x001000>, /* ap 109 */
1675 <0x00047000 0x00347000 0x001000>, /* ap 110 */
1676 <0x00048000 0x00348000 0x001000>, /* ap 111 */
1677 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */
1678 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */
1679 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */
1680 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */
1681 <0x00022000 0x00322000 0x001000>, /* ap 116 */
1682 <0x00023000 0x00323000 0x001000>, /* ap 117 */
1683 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */
1684 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */
1685 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */
1686 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */
1687 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */
1688 <0x00080000 0x00380000 0x020000>, /* ap 123 */
1689 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */
1690 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */
1691 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */
1692 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */
1693 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */
1694 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */
1696 target-module@0 { /* 0x48300000, ap 56 40.0 */
1697 compatible = "ti,sysc-omap4", "ti,sysc";
1698 ti,hwmods = "epwmss0";
1699 reg = <0x0 0x4>,
1700 <0x4 0x4>;
1701 reg-names = "rev", "sysc";
1702 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1703 <SYSC_IDLE_NO>,
1704 <SYSC_IDLE_SMART>,
1705 <SYSC_IDLE_SMART_WKUP>;
1706 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1707 <SYSC_IDLE_NO>,
1708 <SYSC_IDLE_SMART>,
1709 <SYSC_IDLE_SMART_WKUP>;
1710 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1711 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>;
1712 clock-names = "fck";
1713 #address-cells = <1>;
1714 #size-cells = <1>;
1715 ranges = <0x0 0x0 0x1000>;
1717 epwmss0: epwmss@0 {
1718 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1719 reg = <0x0 0x10>;
1720 #address-cells = <1>;
1721 #size-cells = <1>;
1722 ranges = <0 0 0x1000>;
1723 status = "disabled";
1725 ecap0: ecap@100 {
1726 compatible = "ti,am4372-ecap",
1727 "ti,am3352-ecap",
1728 "ti,am33xx-ecap";
1729 #pwm-cells = <3>;
1730 reg = <0x100 0x80>;
1731 clocks = <&l4ls_gclk>;
1732 clock-names = "fck";
1733 status = "disabled";
1734 };
1736 ehrpwm0: pwm@200 {
1737 compatible = "ti,am4372-ehrpwm",
1738 "ti,am3352-ehrpwm",
1739 "ti,am33xx-ehrpwm";
1740 #pwm-cells = <3>;
1741 reg = <0x200 0x80>;
1742 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1743 clock-names = "tbclk", "fck";
1744 status = "disabled";
1745 };
1746 };
1747 };
1749 target-module@2000 { /* 0x48302000, ap 58 4a.0 */
1750 compatible = "ti,sysc-omap4", "ti,sysc";
1751 ti,hwmods = "epwmss1";
1752 reg = <0x2000 0x4>,
1753 <0x2004 0x4>;
1754 reg-names = "rev", "sysc";
1755 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1756 <SYSC_IDLE_NO>,
1757 <SYSC_IDLE_SMART>,
1758 <SYSC_IDLE_SMART_WKUP>;
1759 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1760 <SYSC_IDLE_NO>,
1761 <SYSC_IDLE_SMART>,
1762 <SYSC_IDLE_SMART_WKUP>;
1763 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1764 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>;
1765 clock-names = "fck";
1766 #address-cells = <1>;
1767 #size-cells = <1>;
1768 ranges = <0x0 0x2000 0x1000>;
1770 epwmss1: epwmss@0 {
1771 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1772 reg = <0x0 0x10>;
1773 #address-cells = <1>;
1774 #size-cells = <1>;
1775 ranges = <0 0 0x1000>;
1776 status = "disabled";
1778 ecap1: ecap@100 {
1779 compatible = "ti,am4372-ecap",
1780 "ti,am3352-ecap",
1781 "ti,am33xx-ecap";
1782 #pwm-cells = <3>;
1783 reg = <0x100 0x80>;
1784 clocks = <&l4ls_gclk>;
1785 clock-names = "fck";
1786 status = "disabled";
1787 };
1789 ehrpwm1: pwm@200 {
1790 compatible = "ti,am4372-ehrpwm",
1791 "ti,am3352-ehrpwm",
1792 "ti,am33xx-ehrpwm";
1793 #pwm-cells = <3>;
1794 reg = <0x200 0x80>;
1795 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1796 clock-names = "tbclk", "fck";
1797 status = "disabled";
1798 };
1799 };
1800 };
1802 target-module@4000 { /* 0x48304000, ap 60 44.0 */
1803 compatible = "ti,sysc-omap4", "ti,sysc";
1804 ti,hwmods = "epwmss2";
1805 reg = <0x4000 0x4>,
1806 <0x4004 0x4>;
1807 reg-names = "rev", "sysc";
1808 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1809 <SYSC_IDLE_NO>,
1810 <SYSC_IDLE_SMART>,
1811 <SYSC_IDLE_SMART_WKUP>;
1812 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1813 <SYSC_IDLE_NO>,
1814 <SYSC_IDLE_SMART>,
1815 <SYSC_IDLE_SMART_WKUP>;
1816 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1817 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>;
1818 clock-names = "fck";
1819 #address-cells = <1>;
1820 #size-cells = <1>;
1821 ranges = <0x0 0x4000 0x1000>;
1823 epwmss2: epwmss@0 {
1824 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1825 reg = <0x0 0x10>;
1826 #address-cells = <1>;
1827 #size-cells = <1>;
1828 ranges = <0 0 0x1000>;
1829 status = "disabled";
1831 ecap2: ecap@100 {
1832 compatible = "ti,am4372-ecap",
1833 "ti,am3352-ecap",
1834 "ti,am33xx-ecap";
1835 #pwm-cells = <3>;
1836 reg = <0x100 0x80>;
1837 clocks = <&l4ls_gclk>;
1838 clock-names = "fck";
1839 status = "disabled";
1840 };
1842 ehrpwm2: pwm@200 {
1843 compatible = "ti,am4372-ehrpwm",
1844 "ti,am3352-ehrpwm",
1845 "ti,am33xx-ehrpwm";
1846 #pwm-cells = <3>;
1847 reg = <0x200 0x80>;
1848 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
1849 clock-names = "tbclk", "fck";
1850 status = "disabled";
1851 };
1852 };
1853 };
1855 target-module@6000 { /* 0x48306000, ap 96 58.0 */
1856 compatible = "ti,sysc-omap4", "ti,sysc";
1857 ti,hwmods = "epwmss3";
1858 reg = <0x6000 0x4>,
1859 <0x6004 0x4>;
1860 reg-names = "rev", "sysc";
1861 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1862 <SYSC_IDLE_NO>,
1863 <SYSC_IDLE_SMART>,
1864 <SYSC_IDLE_SMART_WKUP>;
1865 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1866 <SYSC_IDLE_NO>,
1867 <SYSC_IDLE_SMART>,
1868 <SYSC_IDLE_SMART_WKUP>;
1869 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1870 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>;
1871 clock-names = "fck";
1872 #address-cells = <1>;
1873 #size-cells = <1>;
1874 ranges = <0x0 0x6000 0x1000>;
1876 epwmss3: epwmss@0 {
1877 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1878 reg = <0x0 0x10>;
1879 #address-cells = <1>;
1880 #size-cells = <1>;
1881 ranges = <0 0 0x1000>;
1882 status = "disabled";
1884 ehrpwm3: pwm@200 {
1885 compatible = "ti,am4372-ehrpwm",
1886 "ti,am3352-ehrpwm",
1887 "ti,am33xx-ehrpwm";
1888 #pwm-cells = <3>;
1889 reg = <0x200 0x80>;
1890 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
1891 clock-names = "tbclk", "fck";
1892 status = "disabled";
1893 };
1894 };
1895 };
1897 target-module@8000 { /* 0x48308000, ap 98 54.0 */
1898 compatible = "ti,sysc-omap4", "ti,sysc";
1899 ti,hwmods = "epwmss4";
1900 reg = <0x8000 0x4>,
1901 <0x8004 0x4>;
1902 reg-names = "rev", "sysc";
1903 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1904 <SYSC_IDLE_NO>,
1905 <SYSC_IDLE_SMART>,
1906 <SYSC_IDLE_SMART_WKUP>;
1907 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1908 <SYSC_IDLE_NO>,
1909 <SYSC_IDLE_SMART>,
1910 <SYSC_IDLE_SMART_WKUP>;
1911 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1912 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>;
1913 clock-names = "fck";
1914 #address-cells = <1>;
1915 #size-cells = <1>;
1916 ranges = <0x0 0x8000 0x1000>;
1918 epwmss4: epwmss@0 {
1919 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1920 reg = <0x0 0x10>;
1921 #address-cells = <1>;
1922 #size-cells = <1>;
1923 ranges = <0 0 0x1000>;
1924 status = "disabled";
1926 ehrpwm4: pwm@48308200 {
1927 compatible = "ti,am4372-ehrpwm",
1928 "ti,am3352-ehrpwm",
1929 "ti,am33xx-ehrpwm";
1930 #pwm-cells = <3>;
1931 reg = <0x200 0x80>;
1932 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
1933 clock-names = "tbclk", "fck";
1934 status = "disabled";
1935 };
1936 };
1937 };
1939 target-module@a000 { /* 0x4830a000, ap 100 60.0 */
1940 compatible = "ti,sysc-omap4", "ti,sysc";
1941 ti,hwmods = "epwmss5";
1942 reg = <0xa000 0x4>,
1943 <0xa004 0x4>;
1944 reg-names = "rev", "sysc";
1945 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1946 <SYSC_IDLE_NO>,
1947 <SYSC_IDLE_SMART>,
1948 <SYSC_IDLE_SMART_WKUP>;
1949 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1950 <SYSC_IDLE_NO>,
1951 <SYSC_IDLE_SMART>,
1952 <SYSC_IDLE_SMART_WKUP>;
1953 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1954 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>;
1955 clock-names = "fck";
1956 #address-cells = <1>;
1957 #size-cells = <1>;
1958 ranges = <0x0 0xa000 0x1000>;
1960 epwmss5: epwmss@0 {
1961 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1962 reg = <0x0 0x10>;
1963 #address-cells = <1>;
1964 #size-cells = <1>;
1965 ranges = <0 0 0x1000>;
1966 status = "disabled";
1968 ehrpwm5: pwm@200 {
1969 compatible = "ti,am4372-ehrpwm",
1970 "ti,am3352-ehrpwm",
1971 "ti,am33xx-ehrpwm";
1972 #pwm-cells = <3>;
1973 reg = <0x200 0x80>;
1974 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
1975 clock-names = "tbclk", "fck";
1976 status = "disabled";
1977 };
1978 };
1979 };
1981 target-module@10000 { /* 0x48310000, ap 64 4e.1 */
1982 compatible = "ti,sysc-omap2", "ti,sysc";
1983 reg = <0x11fe0 0x4>,
1984 <0x11fe4 0x4>;
1985 reg-names = "rev", "sysc";
1986 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
1987 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1988 <SYSC_IDLE_NO>;
1989 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1990 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>;
1991 clock-names = "fck";
1992 #address-cells = <1>;
1993 #size-cells = <1>;
1994 ranges = <0x0 0x10000 0x2000>;
1996 rng: rng@0 {
1997 compatible = "ti,omap4-rng";
1998 reg = <0x0 0x2000>;
1999 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
2000 };
2001 };
2003 target-module@13000 { /* 0x48313000, ap 90 50.0 */
2004 compatible = "ti,sysc";
2005 status = "disabled";
2006 #address-cells = <1>;
2007 #size-cells = <1>;
2008 ranges = <0x0 0x13000 0x1000>;
2009 };
2011 target-module@18000 { /* 0x48318000, ap 62 4c.0 */
2012 compatible = "ti,sysc";
2013 status = "disabled";
2014 #address-cells = <1>;
2015 #size-cells = <1>;
2016 ranges = <0x0 0x18000 0x4000>;
2017 };
2019 target-module@20000 { /* 0x48320000, ap 82 34.0 */
2020 compatible = "ti,sysc-omap2", "ti,sysc";
2021 reg = <0x20000 0x4>,
2022 <0x20010 0x4>,
2023 <0x20114 0x4>;
2024 reg-names = "rev", "sysc", "syss";
2025 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2026 SYSC_OMAP2_SOFTRESET |
2027 SYSC_OMAP2_AUTOIDLE)>;
2028 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2029 <SYSC_IDLE_NO>,
2030 <SYSC_IDLE_SMART>,
2031 <SYSC_IDLE_SMART_WKUP>;
2032 ti,syss-mask = <1>;
2033 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2034 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>,
2035 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>;
2036 clock-names = "fck", "dbclk";
2037 #address-cells = <1>;
2038 #size-cells = <1>;
2039 ranges = <0x0 0x20000 0x1000>;
2041 gpio4: gpio@0 {
2042 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2043 reg = <0x0 0x1000>;
2044 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
2045 gpio-controller;
2046 #gpio-cells = <2>;
2047 interrupt-controller;
2048 #interrupt-cells = <2>;
2049 status = "disabled";
2050 };
2051 };
2053 target-module@22000 { /* 0x48322000, ap 116 64.0 */
2054 compatible = "ti,sysc-omap2", "ti,sysc";
2055 reg = <0x22000 0x4>,
2056 <0x22010 0x4>,
2057 <0x22114 0x4>;
2058 reg-names = "rev", "sysc", "syss";
2059 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2060 SYSC_OMAP2_SOFTRESET |
2061 SYSC_OMAP2_AUTOIDLE)>;
2062 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2063 <SYSC_IDLE_NO>,
2064 <SYSC_IDLE_SMART>,
2065 <SYSC_IDLE_SMART_WKUP>;
2066 ti,syss-mask = <1>;
2067 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2068 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>,
2069 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>;
2070 clock-names = "fck", "dbclk";
2071 #address-cells = <1>;
2072 #size-cells = <1>;
2073 ranges = <0x0 0x22000 0x1000>;
2075 gpio5: gpio@0 {
2076 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2077 reg = <0x0 0x1000>;
2078 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2079 gpio-controller;
2080 #gpio-cells = <2>;
2081 interrupt-controller;
2082 #interrupt-cells = <2>;
2083 status = "disabled";
2084 };
2085 };
2087 target-module@26000 { /* 0x48326000, ap 86 66.0 */
2088 compatible = "ti,sysc-omap4", "ti,sysc";
2089 ti,hwmods = "vpfe0";
2090 reg = <0x26000 0x4>,
2091 <0x26104 0x4>;
2092 reg-names = "rev", "sysc";
2093 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2094 <SYSC_IDLE_NO>,
2095 <SYSC_IDLE_SMART>;
2096 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2097 <SYSC_IDLE_NO>,
2098 <SYSC_IDLE_SMART>;
2099 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2100 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>;
2101 clock-names = "fck";
2102 #address-cells = <1>;
2103 #size-cells = <1>;
2104 ranges = <0x0 0x26000 0x1000>;
2106 vpfe0: vpfe@0 {
2107 compatible = "ti,am437x-vpfe";
2108 reg = <0x0 0x2000>;
2109 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2110 status = "disabled";
2111 };
2112 };
2114 target-module@28000 { /* 0x48328000, ap 75 0e.0 */
2115 compatible = "ti,sysc-omap4", "ti,sysc";
2116 ti,hwmods = "vpfe1";
2117 reg = <0x28000 0x4>,
2118 <0x28104 0x4>;
2119 reg-names = "rev", "sysc";
2120 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2121 <SYSC_IDLE_NO>,
2122 <SYSC_IDLE_SMART>;
2123 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2124 <SYSC_IDLE_NO>,
2125 <SYSC_IDLE_SMART>;
2126 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2127 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>;
2128 clock-names = "fck";
2129 #address-cells = <1>;
2130 #size-cells = <1>;
2131 ranges = <0x0 0x28000 0x1000>;
2133 vpfe1: vpfe@0 {
2134 compatible = "ti,am437x-vpfe";
2135 reg = <0x0 0x2000>;
2136 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
2137 status = "disabled";
2138 };
2139 };
2141 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */
2142 compatible = "ti,sysc-omap2", "ti,sysc";
2143 ti,hwmods = "dss_core";
2144 reg = <0x2a000 0x4>,
2145 <0x2a010 0x4>,
2146 <0x2a014 0x4>;
2147 reg-names = "rev", "sysc", "syss";
2148 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2149 SYSC_OMAP2_AUTOIDLE)>;
2150 ti,syss-mask = <1>;
2151 /* Domains (P, C): per_pwrdm, dss_clkdm */
2152 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2153 clock-names = "fck";
2154 #address-cells = <1>;
2155 #size-cells = <1>;
2156 ranges = <0x00000000 0x0002a000 0x00000400>,
2157 <0x00000400 0x0002a400 0x00000400>,
2158 <0x00000800 0x0002a800 0x00000400>,
2159 <0x00000c00 0x0002ac00 0x00000400>,
2160 <0x00001000 0x0002b000 0x00001000>;
2161 };
2163 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */
2164 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2165 ti,hwmods = "timer9";
2166 reg = <0x3d000 0x4>,
2167 <0x3d010 0x4>,
2168 <0x3d014 0x4>;
2169 reg-names = "rev", "sysc", "syss";
2170 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2171 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2172 <SYSC_IDLE_NO>,
2173 <SYSC_IDLE_SMART>,
2174 <SYSC_IDLE_SMART_WKUP>;
2175 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2176 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>;
2177 clock-names = "fck";
2178 #address-cells = <1>;
2179 #size-cells = <1>;
2180 ranges = <0x0 0x3d000 0x1000>;
2182 timer9: timer@0 {
2183 compatible = "ti,am4372-timer","ti,am335x-timer";
2184 reg = <0x0 0x400>;
2185 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
2186 status = "disabled";
2187 };
2188 };
2190 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */
2191 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2192 ti,hwmods = "timer10";
2193 reg = <0x3f000 0x4>,
2194 <0x3f010 0x4>,
2195 <0x3f014 0x4>;
2196 reg-names = "rev", "sysc", "syss";
2197 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2198 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2199 <SYSC_IDLE_NO>,
2200 <SYSC_IDLE_SMART>,
2201 <SYSC_IDLE_SMART_WKUP>;
2202 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2203 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>;
2204 clock-names = "fck";
2205 #address-cells = <1>;
2206 #size-cells = <1>;
2207 ranges = <0x0 0x3f000 0x1000>;
2209 timer10: timer@0 {
2210 compatible = "ti,am4372-timer","ti,am335x-timer";
2211 reg = <0x0 0x400>;
2212 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
2213 status = "disabled";
2214 };
2215 };
2217 target-module@41000 { /* 0x48341000, ap 106 76.0 */
2218 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2219 ti,hwmods = "timer11";
2220 reg = <0x41000 0x4>,
2221 <0x41010 0x4>,
2222 <0x41014 0x4>;
2223 reg-names = "rev", "sysc", "syss";
2224 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2225 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2226 <SYSC_IDLE_NO>,
2227 <SYSC_IDLE_SMART>,
2228 <SYSC_IDLE_SMART_WKUP>;
2229 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2230 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>;
2231 clock-names = "fck";
2232 #address-cells = <1>;
2233 #size-cells = <1>;
2234 ranges = <0x0 0x41000 0x1000>;
2236 timer11: timer@0 {
2237 compatible = "ti,am4372-timer","ti,am335x-timer";
2238 reg = <0x0 0x400>;
2239 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
2240 status = "disabled";
2241 };
2242 };
2244 target-module@45000 { /* 0x48345000, ap 108 6a.0 */
2245 compatible = "ti,sysc-omap2", "ti,sysc";
2246 ti,hwmods = "spi4";
2247 reg = <0x45000 0x4>,
2248 <0x45110 0x4>,
2249 <0x45114 0x4>;
2250 reg-names = "rev", "sysc", "syss";
2251 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2252 SYSC_OMAP2_SOFTRESET |
2253 SYSC_OMAP2_AUTOIDLE)>;
2254 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2255 <SYSC_IDLE_NO>,
2256 <SYSC_IDLE_SMART>;
2257 ti,syss-mask = <1>;
2258 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2259 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>;
2260 clock-names = "fck";
2261 #address-cells = <1>;
2262 #size-cells = <1>;
2263 ranges = <0x0 0x45000 0x1000>;
2265 spi4: spi@0 {
2266 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
2267 reg = <0x0 0x400>;
2268 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
2269 #address-cells = <1>;
2270 #size-cells = <0>;
2271 status = "disabled";
2272 };
2273 };
2275 target-module@47000 { /* 0x48347000, ap 110 70.0 */
2276 compatible = "ti,sysc-omap2", "ti,sysc";
2277 reg = <0x47000 0x4>,
2278 <0x47014 0x4>,
2279 <0x47018 0x4>;
2280 reg-names = "rev", "sysc", "syss";
2281 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2282 SYSC_OMAP2_AUTOIDLE)>;
2283 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2284 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>;
2285 clock-names = "fck";
2286 #address-cells = <1>;
2287 #size-cells = <1>;
2288 ranges = <0x0 0x47000 0x1000>;
2290 hdq: hdq@0 {
2291 compatible = "ti,am4372-hdq";
2292 reg = <0x0 0x1000>;
2293 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
2294 clocks = <&func_12m_clk>;
2295 clock-names = "fck";
2296 status = "disabled";
2297 };
2298 };
2300 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */
2301 compatible = "ti,sysc";
2302 status = "disabled";
2303 #address-cells = <1>;
2304 #size-cells = <1>;
2305 ranges = <0x0 0x4c000 0x2000>;
2306 };
2308 target-module@80000 { /* 0x48380000, ap 123 42.0 */
2309 compatible = "ti,sysc-omap4", "ti,sysc";
2310 ti,hwmods = "usb_otg_ss0";
2311 reg = <0x80000 0x4>,
2312 <0x80010 0x4>;
2313 reg-names = "rev", "sysc";
2314 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2315 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2316 <SYSC_IDLE_NO>,
2317 <SYSC_IDLE_SMART>,
2318 <SYSC_IDLE_SMART_WKUP>;
2319 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2320 <SYSC_IDLE_NO>,
2321 <SYSC_IDLE_SMART>,
2322 <SYSC_IDLE_SMART_WKUP>;
2323 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2324 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>;
2325 clock-names = "fck";
2326 #address-cells = <1>;
2327 #size-cells = <1>;
2328 ranges = <0x0 0x80000 0x20000>;
2330 dwc3_1: omap_dwc3@0 {
2331 compatible = "ti,am437x-dwc3";
2332 reg = <0x0 0x10000>;
2333 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2334 #address-cells = <1>;
2335 #size-cells = <1>;
2336 utmi-mode = <1>;
2337 ranges = <0 0 0x20000>;
2339 usb1: usb@10000 {
2340 compatible = "synopsys,dwc3";
2341 reg = <0x10000 0x10000>;
2342 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2343 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2344 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2345 interrupt-names = "peripheral",
2346 "host",
2347 "otg";
2348 phys = <&usb2_phy1>;
2349 phy-names = "usb2-phy";
2350 maximum-speed = "high-speed";
2351 dr_mode = "otg";
2352 status = "disabled";
2353 snps,dis_u3_susphy_quirk;
2354 snps,dis_u2_susphy_quirk;
2355 };
2356 };
2357 };
2359 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */
2360 compatible = "ti,sysc-omap4", "ti,sysc";
2361 ti,hwmods = "ocp2scp0";
2362 reg = <0xa8000 0x4>;
2363 reg-names = "rev";
2364 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2365 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>;
2366 clock-names = "fck";
2367 #address-cells = <1>;
2368 #size-cells = <1>;
2369 ranges = <0x0 0xa8000 0x8000>;
2371 ocp2scp0: ocp2scp@0 {
2372 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2373 #address-cells = <1>;
2374 #size-cells = <1>;
2375 ranges = <0 0 0x8000>;
2377 usb2_phy1: phy@8000 {
2378 compatible = "ti,am437x-usb2";
2379 reg = <0x0 0x8000>;
2380 syscon-phy-power = <&scm_conf 0x620>;
2381 clocks = <&usb_phy0_always_on_clk32k>,
2382 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>;
2383 clock-names = "wkupclk", "refclk";
2384 #phy-cells = <0>;
2385 status = "disabled";
2386 };
2387 };
2388 };
2390 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */
2391 compatible = "ti,sysc-omap4", "ti,sysc";
2392 ti,hwmods = "usb_otg_ss1";
2393 reg = <0xc0000 0x4>,
2394 <0xc0010 0x4>;
2395 reg-names = "rev", "sysc";
2396 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2397 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2398 <SYSC_IDLE_NO>,
2399 <SYSC_IDLE_SMART>,
2400 <SYSC_IDLE_SMART_WKUP>;
2401 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2402 <SYSC_IDLE_NO>,
2403 <SYSC_IDLE_SMART>,
2404 <SYSC_IDLE_SMART_WKUP>;
2405 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2406 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>;
2407 clock-names = "fck";
2408 #address-cells = <1>;
2409 #size-cells = <1>;
2410 ranges = <0x0 0xc0000 0x20000>;
2412 dwc3_2: omap_dwc3@0 {
2413 compatible = "ti,am437x-dwc3";
2414 reg = <0x0 0x10000>;
2415 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2416 #address-cells = <1>;
2417 #size-cells = <1>;
2418 utmi-mode = <1>;
2419 ranges = <0 0 0x20000>;
2421 usb2: usb@10000 {
2422 compatible = "synopsys,dwc3";
2423 reg = <0x10000 0x10000>;
2424 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2425 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2426 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2427 interrupt-names = "peripheral",
2428 "host",
2429 "otg";
2430 phys = <&usb2_phy2>;
2431 phy-names = "usb2-phy";
2432 maximum-speed = "high-speed";
2433 dr_mode = "otg";
2434 status = "disabled";
2435 snps,dis_u3_susphy_quirk;
2436 snps,dis_u2_susphy_quirk;
2437 };
2438 };
2439 };
2441 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */
2442 compatible = "ti,sysc-omap4", "ti,sysc";
2443 ti,hwmods = "ocp2scp1";
2444 reg = <0xe8000 0x4>;
2445 reg-names = "rev";
2446 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2447 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>;
2448 clock-names = "fck";
2449 #address-cells = <1>;
2450 #size-cells = <1>;
2451 ranges = <0x0 0xe8000 0x8000>;
2453 ocp2scp1: ocp2scp@0 {
2454 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2455 #address-cells = <1>;
2456 #size-cells = <1>;
2457 ranges = <0 0 0x8000>;
2459 usb2_phy2: phy@8000 {
2460 compatible = "ti,am437x-usb2";
2461 reg = <0x0 0x8000>;
2462 syscon-phy-power = <&scm_conf 0x628>;
2463 clocks = <&usb_phy1_always_on_clk32k>,
2464 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>;
2465 clock-names = "wkupclk", "refclk";
2466 #phy-cells = <0>;
2467 status = "disabled";
2468 };
2469 };
2470 };
2472 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */
2473 compatible = "ti,sysc";
2474 status = "disabled";
2475 #address-cells = <1>;
2476 #size-cells = <1>;
2477 ranges = <0x0 0xf2000 0x2000>;
2478 };
2479 };
2480 };