1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC).
5 * Copyright (C) 2015 Seagate
7 * Author: Vincent Donnefort <vdonnefort@gmail.com>
11 * TODO: add support for the white SATA LEDs associated with HDD 0 and 1.
14 #include "armada-370.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
20 stdout-path = "serial0:115200n8";
24 device_type = "memory";
25 reg = <0x00000000 0x20000000>; /* 512 MB */
29 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
30 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
44 pinctrl-0 = <&ge0_rgmii_pins>;
45 pinctrl-names = "default";
47 phy-mode = "rgmii-id";
52 pinctrl-0 = <&i2c0_pins>;
53 pinctrl-names = "default";
54 clock-frequency = <100000>;
56 /* RTC - NXP 8563T (second source) */
58 compatible = "nxp,pcf8563";
64 compatible = "microchip,mcp7941x";
74 compatible = "simple-bus";
77 pinctrl-names = "default";
80 compatible = "regulator-fixed";
82 regulator-name = "SATA0 power";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
88 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
91 compatible = "regulator-fixed";
93 regulator-name = "SATA1 power";
94 regulator-min-microvolt = <5000000>;
95 regulator-max-microvolt = <5000000>;
99 gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
104 compatible = "gpio-fan";
105 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH
106 &gpio2 1 GPIO_ACTIVE_HIGH>;
110 compatible = "gpio-keys";
111 #address-cells = <1>;
115 label = "Power button";
116 linux,code = <KEY_POWER>;
117 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
118 debounce-interval = <100>;
121 label = "Backup button";
122 linux,code = <KEY_OPTION>;
123 gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
124 debounce-interval = <100>;
127 label = "Reset Button";
128 linux,code = <KEY_RESTART>;
129 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
130 debounce-interval = <100>;
135 compatible = "gpio-leds";
138 label = "dart:white:power";
139 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
140 linux,default-trigger = "timer";
144 label = "dart:red:power";
145 gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
148 label = "dart:red:sata0";
149 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
152 label = "dart:red:sata1";
153 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
158 compatible = "gpio-poweroff";
159 gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
166 /* USB 3.0 bridge ASM1042A */
174 pinctrl-0 = <&mdio_pins>;
175 pinctrl-names = "default";
177 phy0: ethernet-phy@0 {
183 pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
184 pinctrl-names = "default";
186 hdd0_led_sata_pin: hdd0-led-sata-pin {
187 marvell,pins = "mpp48";
188 marvell,function = "sata1";
190 hdd0_led_gpio_pin: hdd0-led-gpio-pin {
191 marvell,pins = "mpp48";
192 marvell,function = "gpio";
194 hdd1_led_sata_pin: hdd1-led-sata-pin {
195 marvell,pins = "mpp57";
196 marvell,function = "sata0";
198 hdd1_led_gpio_pin: hdd1-led-gpio-pin {
199 marvell,pins = "mpp57";
200 marvell,function = "gpio";
209 label = "pxa3xx_nand-0";
211 marvell,nand-keep-config;
213 nand-ecc-strength = <4>;
214 nand-ecc-step-size = <512>;
217 compatible = "fixed-partitions";
218 #address-cells = <1>;
223 reg = <0x0 0x300000>;
226 label = "device-tree";
227 reg = <0x300000 0x20000>;
231 reg = <0x320000 0x2000000>;
235 reg = <0x2320000 0xdce0000>;