treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / arch / arm / boot / dts / bcm2711.dtsi
blob8eedd6eb409b8cdc394993ab86d1e8803279103a
1 // SPDX-License-Identifier: GPL-2.0
2 #include "bcm283x.dtsi"
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
7 / {
8         compatible = "brcm,bcm2711";
10         #address-cells = <2>;
11         #size-cells = <1>;
13         interrupt-parent = <&gicv2>;
15         reserved-memory {
16                 #address-cells = <2>;
17                 #size-cells = <1>;
18                 ranges;
20                 /*
21                  * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
22                  * that's not good enough for the BCM2711 as some devices can
23                  * only address the lower 1G of memory (ZONE_DMA).
24                  */
25                 linux,cma {
26                         compatible = "shared-dma-pool";
27                         size = <0x2000000>; /* 32MB */
28                         alloc-ranges = <0x0 0x00000000 0x40000000>;
29                         reusable;
30                         linux,cma-default;
31                 };
32         };
35         soc {
36                 /*
37                  * Defined ranges:
38                  *   Common BCM283x peripherals
39                  *   BCM2711-specific peripherals
40                  *   ARM-local peripherals
41                  */
42                 ranges = <0x7e000000  0x0 0xfe000000  0x01800000>,
43                          <0x7c000000  0x0 0xfc000000  0x02000000>,
44                          <0x40000000  0x0 0xff800000  0x00800000>;
45                 /* Emulate a contiguous 30-bit address range for DMA */
46                 dma-ranges = <0xc0000000  0x0 0x00000000  0x40000000>;
48                 /*
49                  * This node is the provider for the enable-method for
50                  * bringing up secondary cores.
51                  */
52                 local_intc: local_intc@40000000 {
53                         compatible = "brcm,bcm2836-l1-intc";
54                         reg = <0x40000000 0x100>;
55                 };
57                 gicv2: interrupt-controller@40041000 {
58                         interrupt-controller;
59                         #interrupt-cells = <3>;
60                         compatible = "arm,gic-400";
61                         reg =   <0x40041000 0x1000>,
62                                 <0x40042000 0x2000>,
63                                 <0x40044000 0x2000>,
64                                 <0x40046000 0x2000>;
65                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
66                                                  IRQ_TYPE_LEVEL_HIGH)>;
67                 };
69                 avs_monitor: avs-monitor@7d5d2000 {
70                         compatible = "brcm,bcm2711-avs-monitor",
71                                      "syscon", "simple-mfd";
72                         reg = <0x7d5d2000 0xf00>;
74                         thermal: thermal {
75                                 compatible = "brcm,bcm2711-thermal";
76                                 #thermal-sensor-cells = <0>;
77                         };
78                 };
80                 dma: dma@7e007000 {
81                         compatible = "brcm,bcm2835-dma";
82                         reg = <0x7e007000 0xb00>;
83                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
84                                      <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
85                                      <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
86                                      <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
87                                      <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
88                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
89                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
90                                      /* DMA lite 7 - 10 */
91                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
92                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
93                                      <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
94                                      <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
95                         interrupt-names = "dma0",
96                                           "dma1",
97                                           "dma2",
98                                           "dma3",
99                                           "dma4",
100                                           "dma5",
101                                           "dma6",
102                                           "dma7",
103                                           "dma8",
104                                           "dma9",
105                                           "dma10";
106                         #dma-cells = <1>;
107                         brcm,dma-channel-mask = <0x07f5>;
108                 };
110                 pm: watchdog@7e100000 {
111                         compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
112                         #power-domain-cells = <1>;
113                         #reset-cells = <1>;
114                         reg = <0x7e100000 0x114>,
115                               <0x7e00a000 0x24>,
116                               <0x7ec11000 0x20>;
117                         clocks = <&clocks BCM2835_CLOCK_V3D>,
118                                  <&clocks BCM2835_CLOCK_PERI_IMAGE>,
119                                  <&clocks BCM2835_CLOCK_H264>,
120                                  <&clocks BCM2835_CLOCK_ISP>;
121                         clock-names = "v3d", "peri_image", "h264", "isp";
122                         system-power-controller;
123                 };
125                 rng@7e104000 {
126                         interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
128                         /* RNG is incompatible with brcm,bcm2835-rng */
129                         status = "disabled";
130                 };
132                 uart2: serial@7e201400 {
133                         compatible = "arm,pl011", "arm,primecell";
134                         reg = <0x7e201400 0x200>;
135                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
136                         clocks = <&clocks BCM2835_CLOCK_UART>,
137                                  <&clocks BCM2835_CLOCK_VPU>;
138                         clock-names = "uartclk", "apb_pclk";
139                         arm,primecell-periphid = <0x00241011>;
140                         status = "disabled";
141                 };
143                 uart3: serial@7e201600 {
144                         compatible = "arm,pl011", "arm,primecell";
145                         reg = <0x7e201600 0x200>;
146                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
147                         clocks = <&clocks BCM2835_CLOCK_UART>,
148                                  <&clocks BCM2835_CLOCK_VPU>;
149                         clock-names = "uartclk", "apb_pclk";
150                         arm,primecell-periphid = <0x00241011>;
151                         status = "disabled";
152                 };
154                 uart4: serial@7e201800 {
155                         compatible = "arm,pl011", "arm,primecell";
156                         reg = <0x7e201800 0x200>;
157                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
158                         clocks = <&clocks BCM2835_CLOCK_UART>,
159                                  <&clocks BCM2835_CLOCK_VPU>;
160                         clock-names = "uartclk", "apb_pclk";
161                         arm,primecell-periphid = <0x00241011>;
162                         status = "disabled";
163                 };
165                 uart5: serial@7e201a00 {
166                         compatible = "arm,pl011", "arm,primecell";
167                         reg = <0x7e201a00 0x200>;
168                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
169                         clocks = <&clocks BCM2835_CLOCK_UART>,
170                                  <&clocks BCM2835_CLOCK_VPU>;
171                         clock-names = "uartclk", "apb_pclk";
172                         arm,primecell-periphid = <0x00241011>;
173                         status = "disabled";
174                 };
176                 spi3: spi@7e204600 {
177                         compatible = "brcm,bcm2835-spi";
178                         reg = <0x7e204600 0x0200>;
179                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
180                         clocks = <&clocks BCM2835_CLOCK_VPU>;
181                         #address-cells = <1>;
182                         #size-cells = <0>;
183                         status = "disabled";
184                 };
186                 spi4: spi@7e204800 {
187                         compatible = "brcm,bcm2835-spi";
188                         reg = <0x7e204800 0x0200>;
189                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
190                         clocks = <&clocks BCM2835_CLOCK_VPU>;
191                         #address-cells = <1>;
192                         #size-cells = <0>;
193                         status = "disabled";
194                 };
196                 spi5: spi@7e204a00 {
197                         compatible = "brcm,bcm2835-spi";
198                         reg = <0x7e204a00 0x0200>;
199                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
200                         clocks = <&clocks BCM2835_CLOCK_VPU>;
201                         #address-cells = <1>;
202                         #size-cells = <0>;
203                         status = "disabled";
204                 };
206                 spi6: spi@7e204c00 {
207                         compatible = "brcm,bcm2835-spi";
208                         reg = <0x7e204c00 0x0200>;
209                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
210                         clocks = <&clocks BCM2835_CLOCK_VPU>;
211                         #address-cells = <1>;
212                         #size-cells = <0>;
213                         status = "disabled";
214                 };
216                 i2c3: i2c@7e205600 {
217                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
218                         reg = <0x7e205600 0x200>;
219                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
220                         clocks = <&clocks BCM2835_CLOCK_VPU>;
221                         #address-cells = <1>;
222                         #size-cells = <0>;
223                         status = "disabled";
224                 };
226                 i2c4: i2c@7e205800 {
227                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
228                         reg = <0x7e205800 0x200>;
229                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
230                         clocks = <&clocks BCM2835_CLOCK_VPU>;
231                         #address-cells = <1>;
232                         #size-cells = <0>;
233                         status = "disabled";
234                 };
236                 i2c5: i2c@7e205a00 {
237                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
238                         reg = <0x7e205a00 0x200>;
239                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
240                         clocks = <&clocks BCM2835_CLOCK_VPU>;
241                         #address-cells = <1>;
242                         #size-cells = <0>;
243                         status = "disabled";
244                 };
246                 i2c6: i2c@7e205c00 {
247                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
248                         reg = <0x7e205c00 0x200>;
249                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
250                         clocks = <&clocks BCM2835_CLOCK_VPU>;
251                         #address-cells = <1>;
252                         #size-cells = <0>;
253                         status = "disabled";
254                 };
256                 pwm1: pwm@7e20c800 {
257                         compatible = "brcm,bcm2835-pwm";
258                         reg = <0x7e20c800 0x28>;
259                         clocks = <&clocks BCM2835_CLOCK_PWM>;
260                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
261                         assigned-clock-rates = <10000000>;
262                         #pwm-cells = <2>;
263                         status = "disabled";
264                 };
266                 emmc2: emmc2@7e340000 {
267                         compatible = "brcm,bcm2711-emmc2";
268                         reg = <0x7e340000 0x100>;
269                         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
270                         clocks = <&clocks BCM2711_CLOCK_EMMC2>;
271                         status = "disabled";
272                 };
274                 hvs@7e400000 {
275                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
276                 };
277         };
279         arm-pmu {
280                 compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
281                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
282                         <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
283                         <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
284                         <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
285                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
286         };
288         timer {
289                 compatible = "arm,armv8-timer";
290                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
291                                           IRQ_TYPE_LEVEL_LOW)>,
292                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
293                                           IRQ_TYPE_LEVEL_LOW)>,
294                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
295                                           IRQ_TYPE_LEVEL_LOW)>,
296                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
297                                           IRQ_TYPE_LEVEL_LOW)>;
298                 /* This only applies to the ARMv7 stub */
299                 arm,cpu-registers-not-fw-configured;
300         };
302         cpus: cpus {
303                 #address-cells = <1>;
304                 #size-cells = <0>;
305                 enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
307                 cpu0: cpu@0 {
308                         device_type = "cpu";
309                         compatible = "arm,cortex-a72";
310                         reg = <0>;
311                         enable-method = "spin-table";
312                         cpu-release-addr = <0x0 0x000000d8>;
313                 };
315                 cpu1: cpu@1 {
316                         device_type = "cpu";
317                         compatible = "arm,cortex-a72";
318                         reg = <1>;
319                         enable-method = "spin-table";
320                         cpu-release-addr = <0x0 0x000000e0>;
321                 };
323                 cpu2: cpu@2 {
324                         device_type = "cpu";
325                         compatible = "arm,cortex-a72";
326                         reg = <2>;
327                         enable-method = "spin-table";
328                         cpu-release-addr = <0x0 0x000000e8>;
329                 };
331                 cpu3: cpu@3 {
332                         device_type = "cpu";
333                         compatible = "arm,cortex-a72";
334                         reg = <3>;
335                         enable-method = "spin-table";
336                         cpu-release-addr = <0x0 0x000000f0>;
337                 };
338         };
340         scb {
341                 compatible = "simple-bus";
342                 #address-cells = <2>;
343                 #size-cells = <1>;
345                 ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>;
347                 genet: ethernet@7d580000 {
348                         compatible = "brcm,bcm2711-genet-v5";
349                         reg = <0x0 0x7d580000 0x10000>;
350                         #address-cells = <0x1>;
351                         #size-cells = <0x1>;
352                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
353                                      <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
354                         status = "disabled";
356                         genet_mdio: mdio@e14 {
357                                 compatible = "brcm,genet-mdio-v5";
358                                 reg = <0xe14 0x8>;
359                                 reg-names = "mdio";
360                                 #address-cells = <0x0>;
361                                 #size-cells = <0x1>;
362                         };
363                 };
364         };
367 &clk_osc {
368         clock-frequency = <54000000>;
371 &clocks {
372         compatible = "brcm,bcm2711-cprman";
375 &cpu_thermal {
376         coefficients = <(-487) 410040>;
377         thermal-sensors = <&thermal>;
380 &dsi0 {
381         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
384 &dsi1 {
385         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
388 &gpio {
389         compatible = "brcm,bcm2711-gpio";
390         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
391                      <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
392                      <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
393                      <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
395         gpclk0_gpio49: gpclk0_gpio49 {
396                 pin-gpclk {
397                         pins = "gpio49";
398                         function = "alt1";
399                         bias-disable;
400                 };
401         };
402         gpclk1_gpio50: gpclk1_gpio50 {
403                 pin-gpclk {
404                         pins = "gpio50";
405                         function = "alt1";
406                         bias-disable;
407                 };
408         };
409         gpclk2_gpio51: gpclk2_gpio51 {
410                 pin-gpclk {
411                         pins = "gpio51";
412                         function = "alt1";
413                         bias-disable;
414                 };
415         };
417         i2c0_gpio46: i2c0_gpio46 {
418                 pin-sda {
419                         function = "alt0";
420                         pins = "gpio46";
421                         bias-pull-up;
422                 };
423                 pin-scl {
424                         function = "alt0";
425                         pins = "gpio47";
426                         bias-disable;
427                 };
428         };
429         i2c1_gpio46: i2c1_gpio46 {
430                 pin-sda {
431                         function = "alt1";
432                         pins = "gpio46";
433                         bias-pull-up;
434                 };
435                 pin-scl {
436                         function = "alt1";
437                         pins = "gpio47";
438                         bias-disable;
439                 };
440         };
441         i2c3_gpio2: i2c3_gpio2 {
442                 pin-sda {
443                         function = "alt5";
444                         pins = "gpio2";
445                         bias-pull-up;
446                 };
447                 pin-scl {
448                         function = "alt5";
449                         pins = "gpio3";
450                         bias-disable;
451                 };
452         };
453         i2c3_gpio4: i2c3_gpio4 {
454                 pin-sda {
455                         function = "alt5";
456                         pins = "gpio4";
457                         bias-pull-up;
458                 };
459                 pin-scl {
460                         function = "alt5";
461                         pins = "gpio5";
462                         bias-disable;
463                 };
464         };
465         i2c4_gpio6: i2c4_gpio6 {
466                 pin-sda {
467                         function = "alt5";
468                         pins = "gpio6";
469                         bias-pull-up;
470                 };
471                 pin-scl {
472                         function = "alt5";
473                         pins = "gpio7";
474                         bias-disable;
475                 };
476         };
477         i2c4_gpio8: i2c4_gpio8 {
478                 pin-sda {
479                         function = "alt5";
480                         pins = "gpio8";
481                         bias-pull-up;
482                 };
483                 pin-scl {
484                         function = "alt5";
485                         pins = "gpio9";
486                         bias-disable;
487                 };
488         };
489         i2c5_gpio10: i2c5_gpio10 {
490                 pin-sda {
491                         function = "alt5";
492                         pins = "gpio10";
493                         bias-pull-up;
494                 };
495                 pin-scl {
496                         function = "alt5";
497                         pins = "gpio11";
498                         bias-disable;
499                 };
500         };
501         i2c5_gpio12: i2c5_gpio12 {
502                 pin-sda {
503                         function = "alt5";
504                         pins = "gpio12";
505                         bias-pull-up;
506                 };
507                 pin-scl {
508                         function = "alt5";
509                         pins = "gpio13";
510                         bias-disable;
511                 };
512         };
513         i2c6_gpio0: i2c6_gpio0 {
514                 pin-sda {
515                         function = "alt5";
516                         pins = "gpio0";
517                         bias-pull-up;
518                 };
519                 pin-scl {
520                         function = "alt5";
521                         pins = "gpio1";
522                         bias-disable;
523                 };
524         };
525         i2c6_gpio22: i2c6_gpio22 {
526                 pin-sda {
527                         function = "alt5";
528                         pins = "gpio22";
529                         bias-pull-up;
530                 };
531                 pin-scl {
532                         function = "alt5";
533                         pins = "gpio23";
534                         bias-disable;
535                 };
536         };
537         i2c_slave_gpio8: i2c_slave_gpio8 {
538                 pins-i2c-slave {
539                         pins = "gpio8",
540                                "gpio9",
541                                "gpio10",
542                                "gpio11";
543                         function = "alt3";
544                 };
545         };
547         jtag_gpio48: jtag_gpio48 {
548                 pins-jtag {
549                         pins = "gpio48",
550                                "gpio49",
551                                "gpio50",
552                                "gpio51",
553                                "gpio52",
554                                "gpio53";
555                         function = "alt4";
556                 };
557         };
559         mii_gpio28: mii_gpio28 {
560                 pins-mii {
561                         pins = "gpio28",
562                                "gpio29",
563                                "gpio30",
564                                "gpio31";
565                         function = "alt4";
566                 };
567         };
568         mii_gpio36: mii_gpio36 {
569                 pins-mii {
570                         pins = "gpio36",
571                                "gpio37",
572                                "gpio38",
573                                "gpio39";
574                         function = "alt5";
575                 };
576         };
578         pcm_gpio50: pcm_gpio50 {
579                 pins-pcm {
580                         pins = "gpio50",
581                                "gpio51",
582                                "gpio52",
583                                "gpio53";
584                         function = "alt2";
585                 };
586         };
588         pwm0_0_gpio12: pwm0_0_gpio12 {
589                 pin-pwm {
590                         pins = "gpio12";
591                         function = "alt0";
592                         bias-disable;
593                 };
594         };
595         pwm0_0_gpio18: pwm0_0_gpio18 {
596                 pin-pwm {
597                         pins = "gpio18";
598                         function = "alt5";
599                         bias-disable;
600                 };
601         };
602         pwm1_0_gpio40: pwm1_0_gpio40 {
603                 pin-pwm {
604                         pins = "gpio40";
605                         function = "alt0";
606                         bias-disable;
607                 };
608         };
609         pwm0_1_gpio13: pwm0_1_gpio13 {
610                 pin-pwm {
611                         pins = "gpio13";
612                         function = "alt0";
613                         bias-disable;
614                 };
615         };
616         pwm0_1_gpio19: pwm0_1_gpio19 {
617                 pin-pwm {
618                         pins = "gpio19";
619                         function = "alt5";
620                         bias-disable;
621                 };
622         };
623         pwm1_1_gpio41: pwm1_1_gpio41 {
624                 pin-pwm {
625                         pins = "gpio41";
626                         function = "alt0";
627                         bias-disable;
628                 };
629         };
630         pwm0_1_gpio45: pwm0_1_gpio45 {
631                 pin-pwm {
632                         pins = "gpio45";
633                         function = "alt0";
634                         bias-disable;
635                 };
636         };
637         pwm0_0_gpio52: pwm0_0_gpio52 {
638                 pin-pwm {
639                         pins = "gpio52";
640                         function = "alt1";
641                         bias-disable;
642                 };
643         };
644         pwm0_1_gpio53: pwm0_1_gpio53 {
645                 pin-pwm {
646                         pins = "gpio53";
647                         function = "alt1";
648                         bias-disable;
649                 };
650         };
652         rgmii_gpio35: rgmii_gpio35 {
653                 pin-start-stop {
654                         pins = "gpio35";
655                         function = "alt4";
656                 };
657                 pin-rx-ok {
658                         pins = "gpio36";
659                         function = "alt4";
660                 };
661         };
662         rgmii_irq_gpio34: rgmii_irq_gpio34 {
663                 pin-irq {
664                         pins = "gpio34";
665                         function = "alt5";
666                 };
667         };
668         rgmii_irq_gpio39: rgmii_irq_gpio39 {
669                 pin-irq {
670                         pins = "gpio39";
671                         function = "alt4";
672                 };
673         };
674         rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
675                 pins-mdio {
676                         pins = "gpio28",
677                                "gpio29";
678                         function = "alt5";
679                 };
680         };
681         rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
682                 pins-mdio {
683                         pins = "gpio37",
684                                "gpio38";
685                         function = "alt4";
686                 };
687         };
689         spi0_gpio46: spi0_gpio46 {
690                 pins-spi {
691                         pins = "gpio46",
692                                "gpio47",
693                                "gpio48",
694                                "gpio49";
695                         function = "alt2";
696                 };
697         };
698         spi2_gpio46: spi2_gpio46 {
699                 pins-spi {
700                         pins = "gpio46",
701                                "gpio47",
702                                "gpio48",
703                                "gpio49",
704                                "gpio50";
705                         function = "alt5";
706                 };
707         };
708         spi3_gpio0: spi3_gpio0 {
709                 pins-spi {
710                         pins = "gpio0",
711                                "gpio1",
712                                "gpio2",
713                                "gpio3";
714                         function = "alt3";
715                 };
716         };
717         spi4_gpio4: spi4_gpio4 {
718                 pins-spi {
719                         pins = "gpio4",
720                                "gpio5",
721                                "gpio6",
722                                "gpio7";
723                         function = "alt3";
724                 };
725         };
726         spi5_gpio12: spi5_gpio12 {
727                 pins-spi {
728                         pins = "gpio12",
729                                "gpio13",
730                                "gpio14",
731                                "gpio15";
732                         function = "alt3";
733                 };
734         };
735         spi6_gpio18: spi6_gpio18 {
736                 pins-spi {
737                         pins = "gpio18",
738                                "gpio19",
739                                "gpio20",
740                                "gpio21";
741                         function = "alt3";
742                 };
743         };
745         uart2_gpio0: uart2_gpio0 {
746                 pin-tx {
747                         pins = "gpio0";
748                         function = "alt4";
749                         bias-disable;
750                 };
751                 pin-rx {
752                         pins = "gpio1";
753                         function = "alt4";
754                         bias-pull-up;
755                 };
756         };
757         uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
758                 pin-cts {
759                         pins = "gpio2";
760                         function = "alt4";
761                         bias-pull-up;
762                 };
763                 pin-rts {
764                         pins = "gpio3";
765                         function = "alt4";
766                         bias-disable;
767                 };
768         };
769         uart3_gpio4: uart3_gpio4 {
770                 pin-tx {
771                         pins = "gpio4";
772                         function = "alt4";
773                         bias-disable;
774                 };
775                 pin-rx {
776                         pins = "gpio5";
777                         function = "alt4";
778                         bias-pull-up;
779                 };
780         };
781         uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
782                 pin-cts {
783                         pins = "gpio6";
784                         function = "alt4";
785                         bias-pull-up;
786                 };
787                 pin-rts {
788                         pins = "gpio7";
789                         function = "alt4";
790                         bias-disable;
791                 };
792         };
793         uart4_gpio8: uart4_gpio8 {
794                 pin-tx {
795                         pins = "gpio8";
796                         function = "alt4";
797                         bias-disable;
798                 };
799                 pin-rx {
800                         pins = "gpio9";
801                         function = "alt4";
802                         bias-pull-up;
803                 };
804         };
805         uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
806                 pin-cts {
807                         pins = "gpio10";
808                         function = "alt4";
809                         bias-pull-up;
810                 };
811                 pin-rts {
812                         pins = "gpio11";
813                         function = "alt4";
814                         bias-disable;
815                 };
816         };
817         uart5_gpio12: uart5_gpio12 {
818                 pin-tx {
819                         pins = "gpio12";
820                         function = "alt4";
821                         bias-disable;
822                 };
823                 pin-rx {
824                         pins = "gpio13";
825                         function = "alt4";
826                         bias-pull-up;
827                 };
828         };
829         uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
830                 pin-cts {
831                         pins = "gpio14";
832                         function = "alt4";
833                         bias-pull-up;
834                 };
835                 pin-rts {
836                         pins = "gpio15";
837                         function = "alt4";
838                         bias-disable;
839                 };
840         };
843 &i2c0 {
844         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
845         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
848 &i2c1 {
849         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
850         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
853 &mailbox {
854         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
857 &sdhci {
858         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
861 &sdhost {
862         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
865 &spi {
866         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
869 &spi1 {
870         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
873 &spi2 {
874         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
877 &system_timer {
878         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
879                      <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
880                      <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
881                      <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
884 &txp {
885         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
888 &uart0 {
889         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
892 &uart1 {
893         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
896 &usb {
897         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
900 &vec {
901         interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;