treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / arch / arm / boot / dts / rk3288-veyron-mickey.dts
blob06a6a9554c484df9ad5f4b98f11043ef76355b64
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Google Veyron Mickey Rev 0 board device tree source
4  *
5  * Copyright 2015 Google, Inc
6  */
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
11 / {
12         model = "Google Mickey";
13         compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
14                      "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
15                      "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
16                      "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
17                      "google,veyron-mickey-rev0", "google,veyron-mickey",
18                      "google,veyron", "rockchip,rk3288";
20         vcc_5v: vcc-5v {
21                 vin-supply = <&vcc33_sys>;
22         };
24         vcc33_io: vcc33_io {
25                 compatible = "regulator-fixed";
26                 regulator-name = "vcc33_io";
27                 regulator-always-on;
28                 regulator-boot-on;
29                 vin-supply = <&vcc33_sys>;
30         };
32         sound {
33                 compatible = "rockchip,rockchip-audio-max98090";
34                 rockchip,model = "VEYRON-HDMI";
35                 rockchip,hdmi-codec = <&hdmi>;
36                 rockchip,i2s-controller = <&i2s>;
37         };
40 &cpu_thermal {
41         /delete-node/ trips;
42         /delete-node/ cooling-maps;
44         trips {
45                 cpu_alert_almost_warm: cpu_alert_almost_warm {
46                         temperature = <63000>; /* millicelsius */
47                         hysteresis = <2000>; /* millicelsius */
48                         type = "passive";
49                 };
50                 cpu_alert_warm: cpu_alert_warm {
51                         temperature = <65000>; /* millicelsius */
52                         hysteresis = <2000>; /* millicelsius */
53                         type = "passive";
54                 };
55                 cpu_alert_almost_hot: cpu_alert_almost_hot {
56                         temperature = <80000>; /* millicelsius */
57                         hysteresis = <2000>; /* millicelsius */
58                         type = "passive";
59                 };
60                 cpu_alert_hot: cpu_alert_hot {
61                         temperature = <82000>; /* millicelsius */
62                         hysteresis = <2000>; /* millicelsius */
63                         type = "passive";
64                 };
65                 cpu_alert_hotter: cpu_alert_hotter {
66                         temperature = <84000>; /* millicelsius */
67                         hysteresis = <2000>; /* millicelsius */
68                         type = "passive";
69                 };
70                 cpu_alert_very_hot: cpu_alert_very_hot {
71                         temperature = <85000>; /* millicelsius */
72                         hysteresis = <2000>; /* millicelsius */
73                         type = "passive";
74                 };
75                 cpu_crit: cpu_crit {
76                         temperature = <90000>; /* millicelsius */
77                         hysteresis = <2000>; /* millicelsius */
78                         type = "critical";
79                 };
80         };
82         cooling-maps {
83                 /*
84                  * After 1st level, throttle the CPU down to as low as 1.4 GHz
85                  * and don't let the GPU go faster than 400 MHz.
86                  */
87                 cpu_warm_limit_cpu {
88                         trip = <&cpu_alert_warm>;
89                         cooling-device = <&cpu0 THERMAL_NO_LIMIT 4>,
90                                          <&cpu1 THERMAL_NO_LIMIT 4>,
91                                          <&cpu2 THERMAL_NO_LIMIT 4>,
92                                          <&cpu3 THERMAL_NO_LIMIT 4>;
93                 };
94                 cpu_warm_limit_gpu {
95                         trip = <&cpu_alert_warm>;
96                         cooling-device = <&gpu 1 1>;
97                 };
99                 /*
100                  * Add some discrete steps to help throttling system deal
101                  * with the fact that there are two passive cooling devices:
102                  * the CPU and the GPU.
103                  *
104                  * - 1.2 GHz - 1.0 GHz (almost hot)
105                  * - 800 MHz           (hot)
106                  * - 800 MHz - 696 MHz (hotter)
107                  * - 696 MHz - min     (very hot)
108                  *
109                  * Note:
110                  * - 800 MHz appears to be a "sweet spot" for me.  I can run
111                  *   some pretty serious workload here and be happy.
112                  * - After 696 MHz we stop lowering voltage, so throttling
113                  *   past there is less effective.
114                  */
115                 cpu_almost_hot_limit_cpu {
116                         trip = <&cpu_alert_almost_hot>;
117                         cooling-device = <&cpu0 5 6>, <&cpu1 5 6>, <&cpu2 5 6>,
118                                          <&cpu3 5 6>;
119                 };
120                 cpu_hot_limit_cpu {
121                         trip = <&cpu_alert_hot>;
122                         cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, <&cpu2 7 7>,
123                                          <&cpu3 7 7>;
124                 };
125                 cpu_hotter_limit_cpu {
126                         trip = <&cpu_alert_hotter>;
127                         cooling-device = <&cpu0 7 8>, <&cpu1 7 8>, <&cpu2 7 8>,
128                                          <&cpu3 7 8>;
129                 };
130                 cpu_very_hot_limit_cpu {
131                         trip = <&cpu_alert_very_hot>;
132                         cooling-device = <&cpu0 8 THERMAL_NO_LIMIT>,
133                                          <&cpu1 8 THERMAL_NO_LIMIT>,
134                                          <&cpu2 8 THERMAL_NO_LIMIT>,
135                                          <&cpu3 8 THERMAL_NO_LIMIT>;
136                 };
138                 /* At very hot, don't let GPU go over 300 MHz */
139                 cpu_very_hot_limit_gpu {
140                         trip = <&cpu_alert_very_hot>;
141                         cooling-device = <&gpu 2 2>;
142                 };
143         };
146 &gpu_thermal {
147         /delete-node/ trips;
148         /delete-node/ cooling-maps;
150         trips {
151                 gpu_alert_warmish: gpu_alert_warmish {
152                         temperature = <60000>; /* millicelsius */
153                         hysteresis = <2000>; /* millicelsius */
154                         type = "passive";
155                 };
156                 gpu_alert_warm: gpu_alert_warm {
157                         temperature = <65000>; /* millicelsius */
158                         hysteresis = <2000>; /* millicelsius */
159                         type = "passive";
160                 };
161                 gpu_alert_hotter: gpu_alert_hotter {
162                         temperature = <84000>; /* millicelsius */
163                         hysteresis = <2000>; /* millicelsius */
164                         type = "passive";
165                 };
166                 gpu_alert_very_very_hot: gpu_alert_very_very_hot {
167                         temperature = <86000>; /* millicelsius */
168                         hysteresis = <2000>; /* millicelsius */
169                         type = "passive";
170                 };
171                 gpu_crit: gpu_crit {
172                         temperature = <90000>; /* millicelsius */
173                         hysteresis = <2000>; /* millicelsius */
174                         type = "critical";
175                 };
176         };
178         cooling-maps {
179                 /* After 1st level throttle the GPU down to as low as 400 MHz */
180                 gpu_warmish_limit_gpu {
181                         trip = <&gpu_alert_warmish>;
182                         cooling-device = <&gpu THERMAL_NO_LIMIT 1>;
183                 };
185                 /*
186                  * Slightly after we throttle the GPU, we'll also make sure that
187                  * the CPU can't go faster than 1.4 GHz.  Note that we won't
188                  * throttle the CPU lower than 1.4 GHz due to GPU heat--we'll
189                  * let the CPU do the rest itself.
190                  */
191                 gpu_warm_limit_cpu {
192                         trip = <&gpu_alert_warm>;
193                         cooling-device = <&cpu0 4 4>,
194                                          <&cpu1 4 4>,
195                                          <&cpu2 4 4>,
196                                          <&cpu3 4 4>;
197                 };
199                 /* When hot, GPU goes down to 300 MHz */
200                 gpu_hotter_limit_gpu {
201                         trip = <&gpu_alert_hotter>;
202                         cooling-device = <&gpu 2 2>;
203                 };
205                 /* When really hot, don't let GPU go _above_ 300 MHz */
206                 gpu_very_very_hot_limit_gpu {
207                         trip = <&gpu_alert_very_very_hot>;
208                         cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
209                 };
210         };
213 &i2c2 {
214         status = "disabled";
217 &i2c4 {
218         status = "disabled";
221 &i2s {
222         status = "okay";
225 &rk808 {
226         pinctrl-names = "default";
227         pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
228         dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
229                     <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
231         /delete-property/ vcc6-supply;
232         /delete-property/ vcc12-supply;
234         vcc11-supply = <&vcc33_sys>;
236         regulators {
237                 /* vcc33_io is sourced directly from vcc33_sys */
238                 /delete-node/ LDO_REG1;
239                 /delete-node/ LDO_REG7;
241                 /* This is not a pwren anymore, but the real power supply */
242                 vdd10_lcd: LDO_REG7 {
243                         regulator-always-on;
244                         regulator-boot-on;
245                         regulator-min-microvolt = <1000000>;
246                         regulator-max-microvolt = <1000000>;
247                         regulator-name = "vdd10_lcd";
248                         regulator-suspend-mem-disabled;
249                 };
251                 vcc18_lcd: LDO_REG8 {
252                         regulator-always-on;
253                         regulator-boot-on;
254                         regulator-min-microvolt = <1800000>;
255                         regulator-max-microvolt = <1800000>;
256                         regulator-name = "vcc18_lcd";
257                         regulator-suspend-mem-disabled;
258                 };
259         };
262 &gpio0 {
263         gpio-line-names = "PMIC_SLEEP_AP",
264                           "",
265                           "",
266                           "",
267                           "PMIC_INT_L",
268                           "POWER_BUTTON_L",
269                           "",
270                           "",
272                           "",
273                           /*
274                            * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
275                            * it REC_MODE_L.
276                            */
277                           "RECOVERY_SW_L",
278                           "OT_RESET",
279                           "",
280                           "",
281                           "AP_WARM_RESET_H",
282                           "",
283                           "I2C0_SDA_PMIC",
285                           "I2C0_SCL_PMIC",
286                           "",
287                           "nFALUT";
290 &gpio2 {
291         gpio-line-names = "CONFIG0",
292                           "CONFIG1",
293                           "CONFIG2",
294                           "",
295                           "",
296                           "",
297                           "",
298                           "CONFIG3",
300                           "",
301                           "EMMC_RST_L";
304 &gpio3 {
305         gpio-line-names = "FLASH0_D0",
306                           "FLASH0_D1",
307                           "FLASH0_D2",
308                           "FLASH0_D3",
309                           "FLASH0_D4",
310                           "FLASH0_D5",
311                           "FLASH0_D6",
312                           "FLASH0_D7",
314                           "",
315                           "",
316                           "",
317                           "",
318                           "",
319                           "",
320                           "",
321                           "",
323                           "FLASH0_CS2/EMMC_CMD",
324                           "",
325                           "FLASH0_DQS/EMMC_CLKO";
328 &gpio4 {
329         gpio-line-names = "",
330                           "",
331                           "",
332                           "",
333                           "",
334                           "",
335                           "",
336                           "",
338                           "",
339                           "",
340                           "",
341                           "",
342                           "",
343                           "",
344                           "",
345                           "",
347                           "UART0_RXD",
348                           "UART0_TXD",
349                           "UART0_CTS_L",
350                           "UART0_RTS_L",
351                           "SDIO0_D0",
352                           "SDIO0_D1",
353                           "SDIO0_D2",
354                           "SDIO0_D3",
356                           "SDIO0_CMD",
357                           "SDIO0_CLK",
358                           "BT_DEV_WAKE",
359                           "",
360                           "WIFI_ENABLE_H",
361                           "BT_ENABLE_L",
362                           "WIFI_HOST_WAKE",
363                           "BT_HOST_WAKE";
366 &gpio7 {
367         gpio-line-names = "",
368                           "PWM_LOG",
369                           "",
370                           "",
371                           "TPM_INT_H",
372                           "SDMMC_DET_L",
373                           /*
374                            * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
375                            * it FW_WP_AP.
376                            */
377                           "AP_FLASH_WP_L",
378                           "",
380                           "CPU_NMI",
381                           "DVSOK",
382                           "HDMI_WAKE",
383                           "POWER_HDMI_ON",
384                           "DVS1",
385                           "",
386                           "",
387                           "DVS2",
389                           "HDMI_CEC",
390                           "",
391                           "",
392                           "I2C5_SDA_HDMI",
393                           "I2C5_SCL_HDMI",
394                           "",
395                           "UART2_RXD",
396                           "UART2_TXD";
399 &gpio8 {
400         gpio-line-names = "RAM_ID0",
401                           "RAM_ID1",
402                           "RAM_ID2",
403                           "RAM_ID3",
404                           "I2C1_SDA_TPM",
405                           "I2C1_SCL_TPM",
406                           "SPI2_CLK",
407                           "SPI2_CS0",
409                           "SPI2_RXD",
410                           "SPI2_TXD";
413 &pinctrl {
414         hdmi {
415                 power_hdmi_on: power-hdmi-on {
416                         rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
417                 };
418         };
420         pmic {
421                 dvs_1: dvs-1 {
422                         rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
423                 };
425                 dvs_2: dvs-2 {
426                         rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
427                 };
428         };
431 &usb_host0_ehci {
432         status = "disabled";
435 &usb_host1 {
436         status = "disabled";
439 &vcc50_hdmi {
440         enable-active-high;
441         gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>;
442         pinctrl-names = "default";
443         pinctrl-0 = <&power_hdmi_on>;