arch/arm/boot/dts/sama5d3_uart.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with
   4  * UART support
   5  *
   6  * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
   7  */
   8
   9 #include <dt-bindings/pinctrl/at91.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/clock/at91.h>
  12
  13 / {
  14         aliases {
  15                 serial5 = &uart0;
  16                 serial6 = &uart1;
  17         };
  18
  19         ahb {
  20                 apb {
  21                         pinctrl@fffff200 {
  22                                 uart0 {
  23                                         pinctrl_uart0: uart0-0 {
  24                                                 atmel,pins =
  25                                                         <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* conflicts with PWMFI2, ISI_D8 */
  26                                                          AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
  27                                         };
  28                                 };
  29
  30                                 uart1 {
  31                                         pinctrl_uart1: uart1-0 {
  32                                                 atmel,pins =
  33                                                         <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* conflicts with TWD0, ISI_VSYNC */
  34                                                          AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
  35                                         };
  36                                 };
  37                         };
  38
  39                         pmc: pmc@fffffc00 {
  40                                 periphck {
  41                                         uart0_clk: uart0_clk {
  42                                                 #clock-cells = <0>;
  43                                                 reg = <16>;
  44                                                 atmel,clk-output-range = <0 66000000>;
  45                                         };
  46
  47                                         uart1_clk: uart1_clk {
  48                                                 #clock-cells = <0>;
  49                                                 reg = <17>;
  50                                                 atmel,clk-output-range = <0 66000000>;
  51                                         };
  52                                 };
  53                         };
  54
  55                         uart0: serial@f0024000 {
  56                                 compatible = "atmel,at91sam9260-usart";
  57                                 reg = <0xf0024000 0x100>;
  58                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
  59                                 pinctrl-names = "default";
  60                                 pinctrl-0 = <&pinctrl_uart0>;
  61                                 clocks = <&uart0_clk>;
  62                                 clock-names = "usart";
  63                                 status = "disabled";
  64                         };
  65
  66                         uart1: serial@f8028000 {
  67                                 compatible = "atmel,at91sam9260-usart";
  68                                 reg = <0xf8028000 0x100>;
  69                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
  70                                 pinctrl-names = "default";
  71                                 pinctrl-0 = <&pinctrl_uart1>;
  72                                 clocks = <&uart1_clk>;
  73                                 clock-names = "usart";
  74                                 status = "disabled";
  75                         };
  76                 };
  77         };
  78 };