1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013 Linaro Ltd.
6 #include "ste-nomadik-pinctrl.dtsi"
11 /* Settings for all UART default and sleep states */
13 uart0_default_mode: uart0_default {
19 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
20 ste,config = <&in_pu>;
24 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
25 ste,config = <&out_hi>;
29 uart0_sleep_mode: uart0_sleep {
31 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
32 ste,config = <&slpm_in_wkup_pdis>;
36 pins = "GPIO1_AJ3"; /* RTS */
37 ste,config = <&slpm_out_hi_wkup_pdis>;
41 pins = "GPIO3_AH3"; /* TXD */
42 ste,config = <&slpm_out_wkup_pdis>;
48 uart1_default_mode: uart1_default {
51 groups = "u1rxtx_a_1";
54 pins = "GPIO4_AH6"; /* RXD */
55 ste,config = <&in_pu>;
59 pins = "GPIO5_AG6"; /* TXD */
60 ste,config = <&out_hi>;
64 uart1_sleep_mode: uart1_sleep {
66 pins = "GPIO4_AH6"; /* RXD */
67 ste,config = <&slpm_in_wkup_pdis>;
71 pins = "GPIO5_AG6"; /* TXD */
72 ste,config = <&slpm_out_wkup_pdis>;
78 uart2_default_mode: uart2_default {
81 groups = "u2rxtx_c_1";
84 pins = "GPIO29_W2"; /* RXD */
85 ste,config = <&in_pu>;
89 pins = "GPIO30_W3"; /* TXD */
90 ste,config = <&out_hi>;
94 uart2_sleep_mode: uart2_sleep {
96 pins = "GPIO29_W2"; /* RXD */
97 ste,config = <&in_wkup_pdis>;
101 pins = "GPIO30_W3"; /* TXD */
102 ste,config = <&out_wkup_pdis>;
107 /* Settings for all I2C default and sleep states */
109 i2c0_default_mode: i2c_default {
115 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
116 ste,config = <&in_pu>;
120 i2c0_sleep_mode: i2c_sleep {
122 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
123 ste,config = <&slpm_in_wkup_pdis>;
129 i2c1_default_mode: i2c_default {
135 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
136 ste,config = <&in_pu>;
140 i2c1_sleep_mode: i2c_sleep {
142 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
143 ste,config = <&slpm_in_wkup_pdis>;
149 i2c2_default_mode: i2c_default {
155 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
156 ste,config = <&in_pu>;
160 i2c2_sleep_mode: i2c_sleep {
162 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
163 ste,config = <&slpm_in_wkup_pdis>;
169 i2c3_default_mode: i2c_default {
175 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
176 ste,config = <&in_pu>;
180 i2c3_sleep_mode: i2c_sleep {
182 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
183 ste,config = <&slpm_in_wkup_pdis>;
189 * Activating I2C4 will conflict with UART1 about the same pins so do not
190 * enable I2C4 and UART1 at the same time.
193 i2c4_default_mode: i2c_default {
199 pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
200 ste,config = <&in_pu>;
204 i2c4_sleep_mode: i2c_sleep {
206 pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
207 ste,config = <&slpm_in_wkup_pdis>;
212 /* Settings for all SPI default and sleep states */
214 spi2_default_mode: spi_default {
217 groups = "spi2_oc1_2";
220 pins = "GPIO216_AG12"; /* FRM */
221 ste,config = <&gpio_out_hi>;
224 pins = "GPIO218_AH11"; /* RXD */
225 ste,config = <&in_pd>;
229 "GPIO215_AH13", /* TXD */
230 "GPIO217_AH12"; /* CLK */
231 ste,config = <&out_lo>;
235 spi2_idle_mode: spi_idle {
237 * The idle mode is basically sleep mode sans wakeups. Also
238 * note that we have muxes the pins off the function here
239 * as we do not state any muxing.
242 pins = "GPIO218_AH11"; /* RXD */
243 ste,config = <&slpm_in_pdis>;
246 pins = "GPIO215_AH13"; /* TXD */
247 ste,config = <&slpm_out_lo_pdis>;
250 pins = "GPIO217_AH12"; /* CLK */
251 ste,config = <&slpm_pdis>;
255 spi2_sleep_mode: spi_sleep {
258 "GPIO216_AG12", /* FRM */
259 "GPIO218_AH11"; /* RXD */
260 ste,config = <&slpm_in_wkup_pdis>;
263 pins = "GPIO215_AH13"; /* TXD */
264 ste,config = <&slpm_out_lo_wkup_pdis>;
267 pins = "GPIO217_AH12"; /* CLK */
268 ste,config = <&slpm_wkup_pdis>;
273 /* Settings for all MMC/SD/SDIO default and sleep states */
275 /* This is the external SD card slot, 4 bits wide */
276 sdi0_default_mode: sdi0_default {
283 "GPIO18_AC2", /* CMDDIR */
284 "GPIO19_AC1", /* DAT0DIR */
285 "GPIO20_AB4"; /* DAT2DIR */
286 ste,config = <&out_hi>;
289 pins = "GPIO22_AA3"; /* FBCLK */
290 ste,config = <&in_nopull>;
293 pins = "GPIO23_AA4"; /* CLK */
294 ste,config = <&out_lo>;
298 "GPIO24_AB2", /* CMD */
299 "GPIO25_Y4", /* DAT0 */
300 "GPIO26_Y2", /* DAT1 */
301 "GPIO27_AA2", /* DAT2 */
302 "GPIO28_AA1"; /* DAT3 */
303 ste,config = <&in_pu>;
307 sdi0_sleep_mode: sdi0_sleep {
310 "GPIO18_AC2", /* CMDDIR */
311 "GPIO19_AC1", /* DAT0DIR */
312 "GPIO20_AB4"; /* DAT2DIR */
313 ste,config = <&slpm_out_hi_wkup_pdis>;
317 "GPIO22_AA3", /* FBCLK */
318 "GPIO24_AB2", /* CMD */
319 "GPIO25_Y4", /* DAT0 */
320 "GPIO26_Y2", /* DAT1 */
321 "GPIO27_AA2", /* DAT2 */
322 "GPIO28_AA1"; /* DAT3 */
323 ste,config = <&slpm_in_wkup_pdis>;
326 pins = "GPIO23_AA4"; /* CLK */
327 ste,config = <&slpm_out_lo_wkup_pdis>;
333 /* This is the WLAN SDIO 4 bits wide */
334 sdi1_default_mode: sdi1_default {
340 pins = "GPIO208_AH16"; /* CLK */
341 ste,config = <&out_lo>;
344 pins = "GPIO209_AG15"; /* FBCLK */
345 ste,config = <&in_nopull>;
349 "GPIO210_AJ15", /* CMD */
350 "GPIO211_AG14", /* DAT0 */
351 "GPIO212_AF13", /* DAT1 */
352 "GPIO213_AG13", /* DAT2 */
353 "GPIO214_AH15"; /* DAT3 */
354 ste,config = <&in_pu>;
358 sdi1_sleep_mode: sdi1_sleep {
360 pins = "GPIO208_AH16"; /* CLK */
361 ste,config = <&slpm_out_lo_wkup_pdis>;
365 "GPIO209_AG15", /* FBCLK */
366 "GPIO210_AJ15", /* CMD */
367 "GPIO211_AG14", /* DAT0 */
368 "GPIO212_AF13", /* DAT1 */
369 "GPIO213_AG13", /* DAT2 */
370 "GPIO214_AH15"; /* DAT3 */
371 ste,config = <&slpm_in_wkup_pdis>;
377 /* This is the eMMC 8 bits wide, usually PoP eMMC */
378 sdi2_default_mode: sdi2_default {
384 pins = "GPIO128_A5"; /* CLK */
385 ste,config = <&out_lo>;
388 pins = "GPIO130_C8"; /* FBCLK */
389 ste,config = <&in_nopull>;
393 "GPIO129_B4", /* CMD */
394 "GPIO131_A12", /* DAT0 */
395 "GPIO132_C10", /* DAT1 */
396 "GPIO133_B10", /* DAT2 */
397 "GPIO134_B9", /* DAT3 */
398 "GPIO135_A9", /* DAT4 */
399 "GPIO136_C7", /* DAT5 */
400 "GPIO137_A7", /* DAT6 */
401 "GPIO138_C5"; /* DAT7 */
402 ste,config = <&in_pu>;
406 sdi2_sleep_mode: sdi2_sleep {
408 pins = "GPIO128_A5"; /* CLK */
409 ste,config = <&out_lo_wkup_pdis>;
413 "GPIO130_C8", /* FBCLK */
414 "GPIO129_B4"; /* CMD */
415 ste,config = <&in_wkup_pdis_en>;
419 "GPIO131_A12", /* DAT0 */
420 "GPIO132_C10", /* DAT1 */
421 "GPIO133_B10", /* DAT2 */
422 "GPIO134_B9", /* DAT3 */
423 "GPIO135_A9", /* DAT4 */
424 "GPIO136_C7", /* DAT5 */
425 "GPIO137_A7", /* DAT6 */
426 "GPIO138_C5"; /* DAT7 */
427 ste,config = <&in_wkup_pdis>;
433 /* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
434 sdi4_default_mode: sdi4_default {
440 pins = "GPIO203_AE23"; /* CLK */
441 ste,config = <&out_lo>;
444 pins = "GPIO202_AF25"; /* FBCLK */
445 ste,config = <&in_nopull>;
449 "GPIO201_AF24", /* CMD */
450 "GPIO200_AH26", /* DAT0 */
451 "GPIO199_AH23", /* DAT1 */
452 "GPIO198_AG25", /* DAT2 */
453 "GPIO197_AH24", /* DAT3 */
454 "GPIO207_AJ23", /* DAT4 */
455 "GPIO206_AG24", /* DAT5 */
456 "GPIO205_AG23", /* DAT6 */
457 "GPIO204_AF23"; /* DAT7 */
458 ste,config = <&in_pu>;
462 sdi4_sleep_mode: sdi4_sleep {
464 pins = "GPIO203_AE23"; /* CLK */
465 ste,config = <&out_lo_wkup_pdis>;
469 "GPIO202_AF25", /* FBCLK */
470 "GPIO201_AF24", /* CMD */
471 "GPIO200_AH26", /* DAT0 */
472 "GPIO199_AH23", /* DAT1 */
473 "GPIO198_AG25", /* DAT2 */
474 "GPIO197_AH24", /* DAT3 */
475 "GPIO207_AJ23", /* DAT4 */
476 "GPIO206_AG24", /* DAT5 */
477 "GPIO205_AG23", /* DAT6 */
478 "GPIO204_AF23"; /* DAT7 */
479 ste,config = <&slpm_in_wkup_pdis>;
485 * Multi-rate serial ports (MSPs) - MSP3 output is internal and
486 * cannot be muxed onto any pins.
489 msp0_default_mode: msp0_default {
492 groups = "msp0txrx_a_1", "msp0tfstck_a_1";
496 "GPIO12_AC4", /* TXD */
497 "GPIO15_AC3", /* RXD */
498 "GPIO13_AF3", /* TFS */
499 "GPIO14_AE3"; /* TCK */
500 ste,config = <&in_nopull>;
506 msp1_default_mode: msp1_default {
509 groups = "msp1txrx_a_1", "msp1_a_1";
513 ste,config = <&out_lo>;
520 ste,config = <&in_nopull>;
527 msp2_default_mode: msp2_default {
528 /* MSP2 usually used for HDMI audio */
535 "GPIO193_AH27", /* TXD */
536 "GPIO194_AF27", /* TCK */
537 "GPIO195_AG28"; /* TFS */
538 ste,config = <&in_pd>;
541 pins = "GPIO196_AG26"; /* RXD */
542 ste,config = <&out_lo>;
549 musb_default_mode: musb_default {
556 "GPIO256_AF28", /* NXT */
557 "GPIO258_AD29", /* XCLK */
558 "GPIO259_AC29", /* DIR */
559 "GPIO260_AD28", /* DAT7 */
560 "GPIO261_AD26", /* DAT6 */
561 "GPIO262_AE26", /* DAT5 */
562 "GPIO263_AG29", /* DAT4 */
563 "GPIO264_AE27", /* DAT3 */
564 "GPIO265_AD27", /* DAT2 */
565 "GPIO266_AC28", /* DAT1 */
566 "GPIO267_AC27"; /* DAT0 */
567 ste,config = <&in_nopull>;
570 pins = "GPIO257_AE29"; /* STP */
571 ste,config = <&out_hi>;
575 musb_sleep_mode: musb_sleep {
578 "GPIO256_AF28", /* NXT */
579 "GPIO258_AD29", /* XCLK */
580 "GPIO259_AC29"; /* DIR */
581 ste,config = <&slpm_wkup_pdis_en>;
584 pins = "GPIO257_AE29"; /* STP */
585 ste,config = <&slpm_out_hi_wkup_pdis>;
589 "GPIO260_AD28", /* DAT7 */
590 "GPIO261_AD26", /* DAT6 */
591 "GPIO262_AE26", /* DAT5 */
592 "GPIO263_AG29", /* DAT4 */
593 "GPIO264_AE27", /* DAT3 */
594 "GPIO265_AD27", /* DAT2 */
595 "GPIO266_AC28", /* DAT1 */
596 "GPIO267_AC27"; /* DAT0 */
597 ste,config = <&slpm_in_wkup_pdis_en>;
603 lcd_default_mode: lcd_default {
605 /* Mux in VSI0 and all the data lines */
608 "lcdvsi0_a_1", /* VSI0 for LCD */
609 "lcd_d0_d7_a_1", /* Data lines */
610 "lcdvsi1_a_1"; /* VSI1 for HDMI */
615 "lcdaclk_b_1"; /* Clock line for TV-out */
619 "GPIO68_E1", /* VSI0 */
620 "GPIO69_E2"; /* VSI1 */
621 ste,config = <&in_pu>;
624 lcd_sleep_mode: lcd_sleep {
626 pins = "GPIO69_E2"; /* VSI1 */
627 ste,config = <&slpm_in_wkup_pdis>;
633 /* SKE keys on position 2 in an 8x8 matrix */
634 ske_kpa2_default_mode: ske_kpa2_default {
641 "GPIO153_B17", /* I7 */
642 "GPIO154_C16", /* I6 */
643 "GPIO155_C19", /* I5 */
644 "GPIO156_C17", /* I4 */
645 "GPIO161_D21", /* I3 */
646 "GPIO162_D20", /* I2 */
647 "GPIO163_C20", /* I1 */
648 "GPIO164_B21"; /* I0 */
649 ste,config = <&in_pd>;
653 "GPIO157_A18", /* O7 */
654 "GPIO158_C18", /* O6 */
655 "GPIO159_B19", /* O5 */
656 "GPIO160_B20", /* O4 */
657 "GPIO165_C21", /* O3 */
658 "GPIO166_A22", /* O2 */
659 "GPIO167_B24", /* O1 */
660 "GPIO168_C22"; /* O0 */
661 ste,config = <&out_lo>;
664 ske_kpa2_sleep_mode: ske_kpa2_sleep {
667 "GPIO153_B17", /* I7 */
668 "GPIO154_C16", /* I6 */
669 "GPIO155_C19", /* I5 */
670 "GPIO156_C17", /* I4 */
671 "GPIO161_D21", /* I3 */
672 "GPIO162_D20", /* I2 */
673 "GPIO163_C20", /* I1 */
674 "GPIO164_B21"; /* I0 */
675 ste,config = <&slpm_in_pu_wkup_pdis_en>;
679 "GPIO157_A18", /* O7 */
680 "GPIO158_C18", /* O6 */
681 "GPIO159_B19", /* O5 */
682 "GPIO160_B20", /* O4 */
683 "GPIO165_C21", /* O3 */
684 "GPIO166_A22", /* O2 */
685 "GPIO167_B24", /* O1 */
686 "GPIO168_C22"; /* O0 */
687 ste,config = <&slpm_out_lo_pdis>;
691 * SKE keys on position 1 and "other C1" combi giving
692 * six rows of six keys.
694 ske_kpaoc1_default_mode: ske_kpaoc1_default {
697 groups = "kp_a_1", "kp_oc1_1";
701 "GPIO91_B6", /* KP_O0 */
702 "GPIO90_A3", /* KP_O1 */
703 "GPIO87_B3", /* KP_O2 */
704 "GPIO86_C6", /* KP_O3 */
705 "GPIO96_D8", /* KP_O6 */
706 "GPIO94_D7"; /* KP_O7 */
707 ste,config = <&out_lo>;
711 "GPIO93_B7", /* KP_I0 */
712 "GPIO92_D6", /* KP_I1 */
713 "GPIO89_E6", /* KP_I2 */
714 "GPIO88_C4", /* KP_I3 */
715 "GPIO97_D9", /* KP_I6 */
716 "GPIO95_E8"; /* KP_I7 */
717 ste,config = <&in_pu>;
723 wlan_default_mode: wlan_default {
725 * Activate this mode with the WLAN chip.
726 * These are plain GPIO pins used by WLAN
730 "GPIO226_AF8", /* WLAN_PMU_EN */
731 "GPIO85_D5"; /* WLAN_ENA */
732 ste,config = <&gpio_out_lo>;
735 pins = "GPIO4_AH6"; /* WLAN_IRQ on UART1 */
736 ste,config = <&gpio_in_pu>;