arch/arm/boot/dts/ste-hrefprev60.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright 2012 ST-Ericsson AB
   4  *
   5  * Device Tree for the HREF+ prior to the v60 variant.
   6  */
   7
   8 #include "ste-dbx5x0.dtsi"
   9 #include "ste-href-ab8500.dtsi"
  10 #include "ste-href.dtsi"
  11
  12 / {
  13         gpio_keys {
  14                 button@1 {
  15                         gpios = <&tc3589x_gpio 7 GPIO_ACTIVE_HIGH>;
  16                 };
  17         };
  18
  19         soc {
  20                 /* Enable UART1 on this board */
  21                 uart@80121000 {
  22                         status = "okay";
  23                 };
  24
  25                 i2c@80004000 {
  26                         tps61052@33 {
  27                                 compatible = "ti,tps61052";
  28                                 reg = <0x33>;
  29                         };
  30
  31                         tc35892@42 {
  32                                 compatible = "toshiba,tc35892";
  33                                 reg = <0x42>;
  34                                 interrupt-parent = <&gpio6>;
  35                                 interrupts = <25 IRQ_TYPE_EDGE_RISING>;
  36                                 pinctrl-names = "default";
  37                                 pinctrl-0 = <&tc35892_hrefprev60_mode>;
  38
  39                                 interrupt-controller;
  40                                 #interrupt-cells = <1>;
  41
  42                                 tc3589x_gpio: tc3589x_gpio {
  43                                         compatible = "tc3589x-gpio";
  44                                         interrupts = <0>;
  45
  46                                         interrupt-controller;
  47                                         #interrupt-cells = <2>;
  48                                         gpio-controller;
  49                                         #gpio-cells = <2>;
  50                                 };
  51                         };
  52                 };
  53
  54                 spi@80002000 {
  55                         /*
  56                          * On the first generation boards, this SSP/SPI port was connected
  57                          * to the AB8500.
  58                          */
  59                         pinctrl-names = "default";
  60                         pinctrl-0 = <&ssp0_hrefprev60_mode>;
  61                 };
  62
  63                 // External Micro SD slot
  64                 sdi0_per1@80126000 {
  65                         cd-gpios  = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>;
  66                 };
  67
  68                 vmmci: regulator-gpio {
  69                         gpios = <&tc3589x_gpio 18 GPIO_ACTIVE_HIGH>;
  70                         enable-gpio = <&tc3589x_gpio 17 GPIO_ACTIVE_HIGH>;
  71                         enable-active-high;
  72                 };
  73
  74                 pinctrl {
  75                         /* Set this up using hogs */
  76                         pinctrl-names = "default";
  77                         pinctrl-0 = <&ipgpio_hrefprev60_mode>;
  78
  79                         ssp0 {
  80                                 ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
  81                                         hrefprev60_mux {
  82                                                 function = "ssp0";
  83                                                 groups = "ssp0_a_1";
  84                                         };
  85                                         hrefprev60_cfg1 {
  86                                                 pins = "GPIO145_C13"; /* RXD */
  87                                                 ste,config = <&in_pd>;
  88                                         };
  89
  90                                 };
  91                         };
  92                         sdi0 {
  93                                 /* This additional pin needed on early MOP500 and HREFs previous to v60 */
  94                                 sdi0_default_mode: sdi0_default {
  95                                         hrefprev60_mux {
  96                                                 function = "mc0";
  97                                                 groups = "mc0dat31dir_a_1";
  98                                         };
  99                                         hrefprev60_cfg1 {
 100                                                 pins = "GPIO21_AB3"; /* DAT31DIR */
 101                                                 ste,config = <&out_hi>;
 102                                         };
 103
 104                                 };
 105                         };
 106                         tc35892 {
 107                                 tc35892_hrefprev60_mode: tc35892_hrefprev60 {
 108                                         hrefprev60_cfg {
 109                                                 pins = "GPIO217_AH12";
 110                                                 ste,config = <&gpio_in_pu>;
 111                                         };
 112                                 };
 113                         };
 114                         ipgpio {
 115                                  ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
 116                                         hrefprev60_mux {
 117                                                 function = "ipgpio";
 118                                                 groups = "ipgpio0_c_1", "ipgpio1_c_1";
 119                                         };
 120                                         hrefprev60_cfg1 {
 121                                                 pins = "GPIO6_AF6", "GPIO7_AG5";
 122                                                 ste,config = <&in_pu>;
 123                                         };
 124                                  };
 125                         };
 126                 };
 127         };
 128 };