arch/arm/boot/dts/tegra20-paz00.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include "tegra20.dtsi"
   6 #include "tegra20-cpu-opp.dtsi"
   7 #include "tegra20-cpu-opp-microvolt.dtsi"
   8
   9 / {
  10         model = "Toshiba AC100 / Dynabook AZ";
  11         compatible = "compal,paz00", "nvidia,tegra20";
  12
  13         aliases {
  14                 rtc0 = "/i2c@7000d000/tps6586x@34";
  15                 rtc1 = "/rtc@7000e000";
  16                 serial0 = &uarta;
  17                 serial1 = &uartc;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         memory@0 {
  25                 reg = <0x00000000 0x20000000>;
  26         };
  27
  28         host1x@50000000 {
  29                 dc@54200000 {
  30                         rgb {
  31                                 status = "okay";
  32
  33                                 nvidia,panel = <&panel>;
  34                         };
  35                 };
  36
  37                 hdmi@54280000 {
  38                         status = "okay";
  39
  40                         vdd-supply = <&hdmi_vdd_reg>;
  41                         pll-supply = <&hdmi_pll_reg>;
  42
  43                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  44                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  45                                 GPIO_ACTIVE_HIGH>;
  46                 };
  47         };
  48
  49         pinmux@70000014 {
  50                 pinctrl-names = "default";
  51                 pinctrl-0 = <&state_default>;
  52
  53                 state_default: pinmux {
  54                         ata {
  55                                 nvidia,pins = "ata", "atc", "atd", "ate",
  56                                         "dap2", "gmb", "gmc", "gmd", "spia",
  57                                         "spib", "spic", "spid", "spie";
  58                                 nvidia,function = "gmi";
  59                         };
  60                         atb {
  61                                 nvidia,pins = "atb", "gma", "gme";
  62                                 nvidia,function = "sdio4";
  63                         };
  64                         cdev1 {
  65                                 nvidia,pins = "cdev1";
  66                                 nvidia,function = "plla_out";
  67                         };
  68                         cdev2 {
  69                                 nvidia,pins = "cdev2";
  70                                 nvidia,function = "pllp_out4";
  71                         };
  72                         crtp {
  73                                 nvidia,pins = "crtp";
  74                                 nvidia,function = "crt";
  75                         };
  76                         csus {
  77                                 nvidia,pins = "csus";
  78                                 nvidia,function = "pllc_out1";
  79                         };
  80                         dap1 {
  81                                 nvidia,pins = "dap1";
  82                                 nvidia,function = "dap1";
  83                         };
  84                         dap3 {
  85                                 nvidia,pins = "dap3";
  86                                 nvidia,function = "dap3";
  87                         };
  88                         dap4 {
  89                                 nvidia,pins = "dap4";
  90                                 nvidia,function = "dap4";
  91                         };
  92                         ddc {
  93                                 nvidia,pins = "ddc";
  94                                 nvidia,function = "i2c2";
  95                         };
  96                         dta {
  97                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  98                                 nvidia,function = "rsvd1";
  99                         };
 100                         dtf {
 101                                 nvidia,pins = "dtf";
 102                                 nvidia,function = "i2c3";
 103                         };
 104                         gpu {
 105                                 nvidia,pins = "gpu", "sdb", "sdd";
 106                                 nvidia,function = "pwm";
 107                         };
 108                         gpu7 {
 109                                 nvidia,pins = "gpu7";
 110                                 nvidia,function = "rtck";
 111                         };
 112                         gpv {
 113                                 nvidia,pins = "gpv", "slxa", "slxk";
 114                                 nvidia,function = "pcie";
 115                         };
 116                         hdint {
 117                                 nvidia,pins = "hdint", "pta";
 118                                 nvidia,function = "hdmi";
 119                         };
 120                         i2cp {
 121                                 nvidia,pins = "i2cp";
 122                                 nvidia,function = "i2cp";
 123                         };
 124                         irrx {
 125                                 nvidia,pins = "irrx", "irtx";
 126                                 nvidia,function = "uarta";
 127                         };
 128                         kbca {
 129                                 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
 130                                 nvidia,function = "kbc";
 131                         };
 132                         kbcb {
 133                                 nvidia,pins = "kbcb", "kbcd";
 134                                 nvidia,function = "sdio2";
 135                         };
 136                         lcsn {
 137                                 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
 138                                         "ld3", "ld4", "ld5", "ld6", "ld7",
 139                                         "ld8", "ld9", "ld10", "ld11", "ld12",
 140                                         "ld13", "ld14", "ld15", "ld16", "ld17",
 141                                         "ldc", "ldi", "lhp0", "lhp1", "lhp2",
 142                                         "lhs", "lm0", "lm1", "lpp", "lpw0",
 143                                         "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
 144                                         "lsda", "lsdi", "lspi", "lvp0", "lvp1",
 145                                         "lvs";
 146                                 nvidia,function = "displaya";
 147                         };
 148                         owc {
 149                                 nvidia,pins = "owc";
 150                                 nvidia,function = "owr";
 151                         };
 152                         pmc {
 153                                 nvidia,pins = "pmc";
 154                                 nvidia,function = "pwr_on";
 155                         };
 156                         rm {
 157                                 nvidia,pins = "rm";
 158                                 nvidia,function = "i2c1";
 159                         };
 160                         sdc {
 161                                 nvidia,pins = "sdc";
 162                                 nvidia,function = "twc";
 163                         };
 164                         sdio1 {
 165                                 nvidia,pins = "sdio1";
 166                                 nvidia,function = "sdio1";
 167                         };
 168                         slxc {
 169                                 nvidia,pins = "slxc", "slxd";
 170                                 nvidia,function = "spi4";
 171                         };
 172                         spdi {
 173                                 nvidia,pins = "spdi", "spdo";
 174                                 nvidia,function = "rsvd2";
 175                         };
 176                         spif {
 177                                 nvidia,pins = "spif", "uac";
 178                                 nvidia,function = "rsvd4";
 179                         };
 180                         spig {
 181                                 nvidia,pins = "spig", "spih";
 182                                 nvidia,function = "spi2_alt";
 183                         };
 184                         uaa {
 185                                 nvidia,pins = "uaa", "uab", "uda";
 186                                 nvidia,function = "ulpi";
 187                         };
 188                         uad {
 189                                 nvidia,pins = "uad";
 190                                 nvidia,function = "spdif";
 191                         };
 192                         uca {
 193                                 nvidia,pins = "uca", "ucb";
 194                                 nvidia,function = "uartc";
 195                         };
 196                         conf_ata {
 197                                 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
 198                                         "cdev1", "cdev2", "dap1", "dap2", "dtf",
 199                                         "gma", "gmb", "gmc", "gmd", "gme",
 200                                         "gpu", "gpu7", "gpv", "i2cp", "pta",
 201                                         "rm", "sdio1", "slxk", "spdo", "uac",
 202                                         "uda";
 203                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 204                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 205                         };
 206                         conf_ck32 {
 207                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 208                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 209                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 210                         };
 211                         conf_crtp {
 212                                 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
 213                                         "dtc", "dte", "slxa", "slxc", "slxd",
 214                                         "spdi";
 215                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 216                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 217                         };
 218                         conf_csus {
 219                                 nvidia,pins = "csus", "spia", "spib", "spid",
 220                                         "spif";
 221                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 222                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 223                         };
 224                         conf_ddc {
 225                                 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
 226                                         "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
 227                                         "spic", "spig", "uaa", "uab";
 228                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 229                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 230                         };
 231                         conf_dta {
 232                                 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
 233                                         "spie", "spih", "uad", "uca", "ucb";
 234                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 235                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 236                         };
 237                         conf_hdint {
 238                                 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
 239                                         "ld3", "ld4", "ld5", "ld6", "ld7",
 240                                         "ld8", "ld9", "ld10", "ld11", "ld12",
 241                                         "ld13", "ld14", "ld15", "ld16", "ld17",
 242                                         "ldc", "ldi", "lhs", "lsc0", "lspi",
 243                                         "lvs", "pmc";
 244                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 245                         };
 246                         conf_lc {
 247                                 nvidia,pins = "lc", "ls";
 248                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 249                         };
 250                         conf_lcsn {
 251                                 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
 252                                         "lm0", "lm1", "lpp", "lpw0", "lpw1",
 253                                         "lpw2", "lsc1", "lsck", "lsda", "lsdi",
 254                                         "lvp0", "lvp1", "sdb";
 255                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 256                         };
 257                         conf_ld17_0 {
 258                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 259                                         "ld23_22";
 260                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 261                         };
 262                 };
 263         };
 264
 265         i2s@70002800 {
 266                 status = "okay";
 267         };
 268
 269         serial@70006000 {
 270                 status = "okay";
 271         };
 272
 273         serial@70006200 {
 274                 status = "okay";
 275         };
 276
 277         pwm: pwm@7000a000 {
 278                 status = "okay";
 279         };
 280
 281         lvds_ddc: i2c@7000c000 {
 282                 status = "okay";
 283                 clock-frequency = <400000>;
 284
 285                 alc5632: alc5632@1e {
 286                         compatible = "realtek,alc5632";
 287                         reg = <0x1e>;
 288                         gpio-controller;
 289                         #gpio-cells = <2>;
 290                 };
 291         };
 292
 293         hdmi_ddc: i2c@7000c400 {
 294                 status = "okay";
 295                 clock-frequency = <100000>;
 296         };
 297
 298         nvec@7000c500 {
 299                 compatible = "nvidia,nvec";
 300                 reg = <0x7000c500 0x100>;
 301                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
 302                 #address-cells = <1>;
 303                 #size-cells = <0>;
 304                 clock-frequency = <80000>;
 305                 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
 306                 slave-addr = <138>;
 307                 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
 308                          <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
 309                 clock-names = "div-clk", "fast-clk";
 310                 resets = <&tegra_car 67>;
 311                 reset-names = "i2c";
 312         };
 313
 314         i2c@7000d000 {
 315                 status = "okay";
 316                 clock-frequency = <400000>;
 317
 318                 pmic: tps6586x@34 {
 319                         compatible = "ti,tps6586x";
 320                         reg = <0x34>;
 321                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 322
 323                         #gpio-cells = <2>;
 324                         gpio-controller;
 325
 326                         sys-supply = <&p5valw_reg>;
 327                         vin-sm0-supply = <&sys_reg>;
 328                         vin-sm1-supply = <&sys_reg>;
 329                         vin-sm2-supply = <&sys_reg>;
 330                         vinldo01-supply = <&sm2_reg>;
 331                         vinldo23-supply = <&sm2_reg>;
 332                         vinldo4-supply = <&sm2_reg>;
 333                         vinldo678-supply = <&sm2_reg>;
 334                         vinldo9-supply = <&sm2_reg>;
 335
 336                         regulators {
 337                                 sys_reg: sys {
 338                                         regulator-name = "vdd_sys";
 339                                         regulator-always-on;
 340                                 };
 341
 342                                 core_vdd_reg: sm0 {
 343                                         regulator-name = "+1.2vs_sm0,vdd_core";
 344                                         regulator-min-microvolt = <1200000>;
 345                                         regulator-max-microvolt = <1225000>;
 346                                         regulator-coupled-with = <&rtc_vdd_reg &cpu_vdd_reg>;
 347                                         regulator-coupled-max-spread = <170000 450000>;
 348                                         regulator-always-on;
 349
 350                                         nvidia,tegra-core-regulator;
 351                                 };
 352
 353                                 cpu_vdd_reg: sm1 {
 354                                         regulator-name = "+1.0vs_sm1,vdd_cpu";
 355                                         regulator-min-microvolt = <750000>;
 356                                         regulator-max-microvolt = <1100000>;
 357                                         regulator-coupled-with = <&core_vdd_reg &rtc_vdd_reg>;
 358                                         regulator-coupled-max-spread = <450000 450000>;
 359                                         regulator-always-on;
 360
 361                                         nvidia,tegra-cpu-regulator;
 362                                 };
 363
 364                                 sm2_reg: sm2 {
 365                                         regulator-name = "+3.7vs_sm2,vin_ldo*";
 366                                         regulator-min-microvolt = <3700000>;
 367                                         regulator-max-microvolt = <3700000>;
 368                                         regulator-always-on;
 369                                 };
 370
 371                                 /* LDO0 is not connected to anything */
 372
 373                                 ldo1 {
 374                                         regulator-name = "+1.1vs_ldo1,avdd_pll*";
 375                                         regulator-min-microvolt = <1100000>;
 376                                         regulator-max-microvolt = <1100000>;
 377                                         regulator-always-on;
 378                                 };
 379
 380                                 rtc_vdd_reg: ldo2 {
 381                                         regulator-name = "+1.2vs_ldo2,vdd_rtc";
 382                                         regulator-min-microvolt = <1200000>;
 383                                         regulator-max-microvolt = <1225000>;
 384                                         regulator-coupled-with = <&core_vdd_reg &cpu_vdd_reg>;
 385                                         regulator-coupled-max-spread = <170000 450000>;
 386                                         regulator-always-on;
 387
 388                                         nvidia,tegra-rtc-regulator;
 389                                 };
 390
 391                                 ldo3 {
 392                                         regulator-name = "+3.3vs_ldo3,avdd_usb*";
 393                                         regulator-min-microvolt = <3300000>;
 394                                         regulator-max-microvolt = <3300000>;
 395                                         regulator-always-on;
 396                                 };
 397
 398                                 ldo4 {
 399                                         regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
 400                                         regulator-min-microvolt = <1800000>;
 401                                         regulator-max-microvolt = <1800000>;
 402                                         regulator-always-on;
 403                                 };
 404
 405                                 ldo5 {
 406                                         regulator-name = "+2.85vs_ldo5,vcore_mmc";
 407                                         regulator-min-microvolt = <2850000>;
 408                                         regulator-max-microvolt = <2850000>;
 409                                         regulator-always-on;
 410                                 };
 411
 412                                 ldo6 {
 413                                         /*
 414                                          * Research indicates this should be
 415                                          * 1.8v; other boards that use this
 416                                          * rail for the same purpose need it
 417                                          * set to 1.8v. The schematic signal
 418                                          * name is incorrect; perhaps copied
 419                                          * from an incorrect NVIDIA reference.
 420                                          */
 421                                         regulator-name = "+2.85vs_ldo6,avdd_vdac";
 422                                         regulator-min-microvolt = <1800000>;
 423                                         regulator-max-microvolt = <1800000>;
 424                                 };
 425
 426                                 hdmi_vdd_reg: ldo7 {
 427                                         regulator-name = "+3.3vs_ldo7,avdd_hdmi";
 428                                         regulator-min-microvolt = <3300000>;
 429                                         regulator-max-microvolt = <3300000>;
 430                                 };
 431
 432                                 hdmi_pll_reg: ldo8 {
 433                                         regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
 434                                         regulator-min-microvolt = <1800000>;
 435                                         regulator-max-microvolt = <1800000>;
 436                                 };
 437
 438                                 ldo9 {
 439                                         regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
 440                                         regulator-min-microvolt = <2850000>;
 441                                         regulator-max-microvolt = <2850000>;
 442                                         regulator-always-on;
 443                                 };
 444
 445                                 ldo_rtc {
 446                                         regulator-name = "+3.3vs_rtc";
 447                                         regulator-min-microvolt = <3300000>;
 448                                         regulator-max-microvolt = <3300000>;
 449                                         regulator-always-on;
 450                                 };
 451                         };
 452                 };
 453
 454                 adt7461@4c {
 455                         compatible = "adi,adt7461";
 456                         reg = <0x4c>;
 457                 };
 458         };
 459
 460         pmc@7000e400 {
 461                 nvidia,invert-interrupt;
 462                 nvidia,suspend-mode = <1>;
 463                 nvidia,cpu-pwr-good-time = <2000>;
 464                 nvidia,cpu-pwr-off-time = <0>;
 465                 nvidia,core-pwr-good-time = <3845 3845>;
 466                 nvidia,core-pwr-off-time = <0>;
 467                 nvidia,sys-clock-req-active-high;
 468         };
 469
 470         usb@c5000000 {
 471                 compatible = "nvidia,tegra20-udc";
 472                 status = "okay";
 473                 dr_mode = "peripheral";
 474         };
 475
 476         usb-phy@c5000000 {
 477                 status = "okay";
 478         };
 479
 480         usb@c5004000 {
 481                 status = "okay";
 482                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 483                         GPIO_ACTIVE_LOW>;
 484         };
 485
 486         usb-phy@c5004000 {
 487                 status = "okay";
 488                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 489                         GPIO_ACTIVE_LOW>;
 490         };
 491
 492         usb@c5008000 {
 493                 status = "okay";
 494         };
 495
 496         usb-phy@c5008000 {
 497                 status = "okay";
 498         };
 499
 500         sdhci@c8000000 {
 501                 status = "okay";
 502                 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
 503                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 504                 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
 505                 bus-width = <4>;
 506         };
 507
 508         sdhci@c8000600 {
 509                 status = "okay";
 510                 bus-width = <8>;
 511                 non-removable;
 512         };
 513
 514         backlight: backlight {
 515                 compatible = "pwm-backlight";
 516
 517                 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
 518                 pwms = <&pwm 0 5000000>;
 519
 520                 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
 521                 default-brightness-level = <10>;
 522
 523                 backlight-boot-off;
 524         };
 525
 526         clocks {
 527                 compatible = "simple-bus";
 528                 #address-cells = <1>;
 529                 #size-cells = <0>;
 530
 531                 clk32k_in: clock@0 {
 532                         compatible = "fixed-clock";
 533                         reg = <0>;
 534                         #clock-cells = <0>;
 535                         clock-frequency = <32768>;
 536                 };
 537         };
 538
 539         gpio-keys {
 540                 compatible = "gpio-keys";
 541
 542                 wakeup {
 543                         label = "Wakeup";
 544                         gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
 545                         linux,code = <KEY_WAKEUP>;
 546                         wakeup-source;
 547                 };
 548         };
 549
 550         gpio-leds {
 551                 compatible = "gpio-leds";
 552
 553                 wifi {
 554                         label = "wifi-led";
 555                         gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 556                         linux,default-trigger = "rfkill0";
 557                 };
 558         };
 559
 560         panel: panel {
 561                 compatible = "samsung,ltn101nt05", "simple-panel";
 562
 563                 ddc-i2c-bus = <&lvds_ddc>;
 564                 power-supply = <&vdd_pnl_reg>;
 565                 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
 566
 567                 backlight = <&backlight>;
 568         };
 569
 570         regulators {
 571                 compatible = "simple-bus";
 572                 #address-cells = <1>;
 573                 #size-cells = <0>;
 574
 575                 p5valw_reg: regulator@0 {
 576                         compatible = "regulator-fixed";
 577                         reg = <0>;
 578                         regulator-name = "+5valw";
 579                         regulator-min-microvolt = <5000000>;
 580                         regulator-max-microvolt = <5000000>;
 581                         regulator-always-on;
 582                 };
 583
 584                 vdd_pnl_reg: regulator@1 {
 585                         compatible = "regulator-fixed";
 586                         reg = <1>;
 587                         regulator-name = "+3VS,vdd_pnl";
 588                         regulator-min-microvolt = <3300000>;
 589                         regulator-max-microvolt = <3300000>;
 590                         regulator-boot-on;
 591                         gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
 592                         enable-active-high;
 593                 };
 594         };
 595
 596         sound {
 597                 compatible = "nvidia,tegra-audio-alc5632-paz00",
 598                         "nvidia,tegra-audio-alc5632";
 599
 600                 nvidia,model = "Compal PAZ00";
 601
 602                 nvidia,audio-routing =
 603                         "Int Spk", "SPKOUT",
 604                         "Int Spk", "SPKOUTN",
 605                         "Headset Mic", "MICBIAS1",
 606                         "MIC1", "Headset Mic",
 607                         "Headset Stereophone", "HPR",
 608                         "Headset Stereophone", "HPL",
 609                         "DMICDAT", "Digital Mic";
 610
 611                 nvidia,audio-codec = <&alc5632>;
 612                 nvidia,i2s-controller = <&tegra_i2s1>;
 613                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 614                         GPIO_ACTIVE_HIGH>;
 615
 616                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 617                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 618                          <&tegra_car TEGRA20_CLK_CDEV1>;
 619                 clock-names = "pll_a", "pll_a_out0", "mclk";
 620         };
 621
 622         cpus {
 623                 cpu0: cpu@0 {
 624                         cpu-supply = <&cpu_vdd_reg>;
 625                         operating-points-v2 = <&cpu0_opp_table>;
 626                 };
 627
 628                 cpu@1 {
 629                         cpu-supply = <&cpu_vdd_reg>;
 630                         operating-points-v2 = <&cpu0_opp_table>;
 631                 };
 632         };
 633 };