arch/arm/boot/dts/tegra30-cardhu-a04.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include "tegra30-cardhu.dtsi"
   5 #include "tegra30-cpu-opp.dtsi"
   6 #include "tegra30-cpu-opp-microvolt.dtsi"
   7
   8 /* This dts file support the cardhu A04 and later versions of board */
   9
  10 / {
  11         model = "NVIDIA Tegra30 Cardhu A04 (A05, A06, A07) evaluation board";
  12         compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
  13
  14         sdhci@78000400 {
  15                 status = "okay";
  16                 power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
  17                 bus-width = <4>;
  18                 keep-power-in-suspend;
  19         };
  20
  21         regulators {
  22                 compatible = "simple-bus";
  23                 #address-cells = <1>;
  24                 #size-cells = <0>;
  25
  26                 ddr_reg: regulator@100 {
  27                         compatible = "regulator-fixed";
  28                         regulator-name = "ddr";
  29                         reg = <100>;
  30                         regulator-min-microvolt = <1500000>;
  31                         regulator-max-microvolt = <1500000>;
  32                         regulator-always-on;
  33                         regulator-boot-on;
  34                         enable-active-high;
  35                         gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
  36                 };
  37
  38                 sys_3v3_reg: regulator@101 {
  39                         compatible = "regulator-fixed";
  40                         reg = <101>;
  41                         regulator-name = "sys_3v3";
  42                         regulator-min-microvolt = <3300000>;
  43                         regulator-max-microvolt = <3300000>;
  44                         regulator-always-on;
  45                         regulator-boot-on;
  46                         enable-active-high;
  47                         gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
  48                 };
  49
  50                 usb1_vbus_reg: regulator@102 {
  51                         compatible = "regulator-fixed";
  52                         reg = <102>;
  53                         regulator-name = "usb1_vbus";
  54                         regulator-min-microvolt = <5000000>;
  55                         regulator-max-microvolt = <5000000>;
  56                         enable-active-high;
  57                         gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
  58                         gpio-open-drain;
  59                         vin-supply = <&vdd_5v0_reg>;
  60                 };
  61
  62                 usb3_vbus_reg: regulator@103 {
  63                         compatible = "regulator-fixed";
  64                         reg = <103>;
  65                         regulator-name = "usb3_vbus";
  66                         regulator-min-microvolt = <5000000>;
  67                         regulator-max-microvolt = <5000000>;
  68                         enable-active-high;
  69                         gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
  70                         gpio-open-drain;
  71                         vin-supply = <&vdd_5v0_reg>;
  72                 };
  73
  74                 vdd_5v0_reg: regulator@104 {
  75                         compatible = "regulator-fixed";
  76                         reg = <104>;
  77                         regulator-name = "5v0";
  78                         regulator-min-microvolt = <5000000>;
  79                         regulator-max-microvolt = <5000000>;
  80                         enable-active-high;
  81                         gpio = <&pmic 8 GPIO_ACTIVE_HIGH>;
  82                 };
  83
  84                 vdd_bl_reg: regulator@105 {
  85                         compatible = "regulator-fixed";
  86                         reg = <105>;
  87                         regulator-name = "vdd_bl";
  88                         regulator-min-microvolt = <5000000>;
  89                         regulator-max-microvolt = <5000000>;
  90                         regulator-always-on;
  91                         regulator-boot-on;
  92                         enable-active-high;
  93                         gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
  94                 };
  95
  96                 vdd_bl2_reg: regulator@106 {
  97                         compatible = "regulator-fixed";
  98                         reg = <106>;
  99                         regulator-name = "vdd_bl2";
 100                         regulator-min-microvolt = <5000000>;
 101                         regulator-max-microvolt = <5000000>;
 102                         regulator-always-on;
 103                         regulator-boot-on;
 104                         enable-active-high;
 105                         gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
 106                 };
 107         };
 108
 109         i2c@7000d000 {
 110                 pmic: tps65911@2d {
 111                         regulators {
 112                                 vddctrl_reg: vddctrl {
 113                                         regulator-min-microvolt = <800000>;
 114                                         regulator-max-microvolt = <1125000>;
 115                                         regulator-coupled-with = <&vddcore_reg>;
 116                                         regulator-coupled-max-spread = <300000>;
 117                                         regulator-max-step-microvolt = <100000>;
 118
 119                                         nvidia,tegra-cpu-regulator;
 120                                 };
 121                         };
 122                 };
 123
 124                 vddcore_reg: tps62361@60 {
 125                         regulator-coupled-with = <&vddctrl_reg>;
 126                         regulator-coupled-max-spread = <300000>;
 127                         regulator-max-step-microvolt = <100000>;
 128
 129                         nvidia,tegra-core-regulator;
 130                 };
 131         };
 132
 133         cpus {
 134                 cpu0: cpu@0 {
 135                         cpu-supply = <&vddctrl_reg>;
 136                         operating-points-v2 = <&cpu0_opp_table>;
 137                 };
 138
 139                 cpu@1 {
 140                         cpu-supply = <&vddctrl_reg>;
 141                         operating-points-v2 = <&cpu0_opp_table>;
 142                 };
 143
 144                 cpu@2 {
 145                         cpu-supply = <&vddctrl_reg>;
 146                         operating-points-v2 = <&cpu0_opp_table>;
 147                 };
 148
 149                 cpu@3 {
 150                         cpu-supply = <&vddctrl_reg>;
 151                         operating-points-v2 = <&cpu0_opp_table>;
 152                 };
 153         };
 154 };