1 // SPDX-License-Identifier: GPL-2.0
3 * AM33XX Arch Power Management Routines
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
9 #include <asm/smp_scu.h>
10 #include <asm/suspend.h>
11 #include <linux/errno.h>
12 #include <linux/platform_data/pm33xx.h>
13 #include <linux/clk.h>
14 #include <linux/platform_data/gpio-omap.h>
15 #include <linux/pinctrl/pinmux.h>
16 #include <linux/wkup_m3_ipc.h>
18 #include <linux/rtc.h>
23 #include "clockdomain.h"
25 #include "omap_hwmod.h"
27 #include "powerdomain.h"
32 static struct powerdomain
*cefuse_pwrdm
, *gfx_pwrdm
, *per_pwrdm
, *mpu_pwrdm
;
33 static struct clockdomain
*gfx_l4ls_clkdm
;
34 static void __iomem
*scu_base
;
35 static struct omap_hwmod
*rtc_oh
;
37 static int am43xx_map_scu(void)
39 scu_base
= ioremap(scu_a9_get_base(), SZ_256
);
47 static int am33xx_check_off_mode_enable(void)
50 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n");
52 /* off mode not supported on am335x so return 0 always */
56 static int am43xx_check_off_mode_enable(void)
59 * Check for am437x-gp-evm which has the right Hardware design to
60 * support this mode reliably.
62 if (of_machine_is_compatible("ti,am437x-gp-evm") && enable_off_mode
)
63 return enable_off_mode
;
64 else if (enable_off_mode
)
65 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n");
70 static int amx3_common_init(void)
72 gfx_pwrdm
= pwrdm_lookup("gfx_pwrdm");
73 per_pwrdm
= pwrdm_lookup("per_pwrdm");
74 mpu_pwrdm
= pwrdm_lookup("mpu_pwrdm");
76 if ((!gfx_pwrdm
) || (!per_pwrdm
) || (!mpu_pwrdm
))
79 (void)clkdm_for_each(omap_pm_clkdms_setup
, NULL
);
81 /* CEFUSE domain can be turned off post bootup */
82 cefuse_pwrdm
= pwrdm_lookup("cefuse_pwrdm");
84 pr_err("PM: Failed to get cefuse_pwrdm\n");
85 else if (omap_type() != OMAP2_DEVICE_TYPE_GP
)
86 pr_info("PM: Leaving EFUSE power domain active\n");
88 omap_set_pwrdm_state(cefuse_pwrdm
, PWRDM_POWER_OFF
);
93 static int am33xx_suspend_init(void)
97 gfx_l4ls_clkdm
= clkdm_lookup("gfx_l4ls_gfx_clkdm");
99 if (!gfx_l4ls_clkdm
) {
100 pr_err("PM: Cannot lookup gfx_l4ls_clkdm clockdomains\n");
104 ret
= amx3_common_init();
109 static int am43xx_suspend_init(void)
113 ret
= am43xx_map_scu();
115 pr_err("PM: Could not ioremap SCU\n");
119 ret
= amx3_common_init();
124 static void amx3_pre_suspend_common(void)
126 omap_set_pwrdm_state(gfx_pwrdm
, PWRDM_POWER_OFF
);
129 static void amx3_post_suspend_common(void)
133 * Because gfx_pwrdm is the only one under MPU control,
134 * comment on transition status
136 status
= pwrdm_read_pwrst(gfx_pwrdm
);
137 if (status
!= PWRDM_POWER_OFF
)
138 pr_err("PM: GFX domain did not transition: %x\n", status
);
141 static int am33xx_suspend(unsigned int state
, int (*fn
)(unsigned long),
146 amx3_pre_suspend_common();
147 ret
= cpu_suspend(args
, fn
);
148 amx3_post_suspend_common();
151 * BUG: GFX_L4LS clock domain needs to be woken up to
152 * ensure thet L4LS clock domain does not get stuck in
153 * transition. If that happens L3 module does not get
154 * disabled, thereby leading to PER power domain
158 clkdm_wakeup(gfx_l4ls_clkdm
);
159 clkdm_sleep(gfx_l4ls_clkdm
);
164 static int am43xx_suspend(unsigned int state
, int (*fn
)(unsigned long),
169 amx3_pre_suspend_common();
170 scu_power_mode(scu_base
, SCU_PM_POWEROFF
);
171 ret
= cpu_suspend(args
, fn
);
172 scu_power_mode(scu_base
, SCU_PM_NORMAL
);
174 if (!am43xx_check_off_mode_enable())
175 amx3_post_suspend_common();
180 static struct am33xx_pm_sram_addr
*amx3_get_sram_addrs(void)
183 return &am33xx_pm_sram
;
184 else if (soc_is_am437x())
185 return &am43xx_pm_sram
;
190 void __iomem
*am43xx_get_rtc_base_addr(void)
192 rtc_oh
= omap_hwmod_lookup("rtc");
194 return omap_hwmod_get_mpu_rt_va(rtc_oh
);
197 static void am43xx_save_context(void)
201 static void am33xx_save_context(void)
203 omap_intc_save_context();
206 static void am33xx_restore_context(void)
208 omap_intc_restore_context();
211 static void am43xx_restore_context(void)
214 * HACK: restore dpll_per_clkdcoldo register contents, to avoid
215 * breaking suspend-resume
217 writel_relaxed(0x0, AM33XX_L4_WK_IO_ADDRESS(0x44df2e14));
220 static void am43xx_prepare_rtc_suspend(void)
222 omap_hwmod_enable(rtc_oh
);
225 static void am43xx_prepare_rtc_resume(void)
227 omap_hwmod_idle(rtc_oh
);
230 static struct am33xx_pm_platform_data am33xx_ops
= {
231 .init
= am33xx_suspend_init
,
232 .soc_suspend
= am33xx_suspend
,
233 .get_sram_addrs
= amx3_get_sram_addrs
,
234 .save_context
= am33xx_save_context
,
235 .restore_context
= am33xx_restore_context
,
236 .prepare_rtc_suspend
= am43xx_prepare_rtc_suspend
,
237 .prepare_rtc_resume
= am43xx_prepare_rtc_resume
,
238 .check_off_mode_enable
= am33xx_check_off_mode_enable
,
239 .get_rtc_base_addr
= am43xx_get_rtc_base_addr
,
242 static struct am33xx_pm_platform_data am43xx_ops
= {
243 .init
= am43xx_suspend_init
,
244 .soc_suspend
= am43xx_suspend
,
245 .get_sram_addrs
= amx3_get_sram_addrs
,
246 .save_context
= am43xx_save_context
,
247 .restore_context
= am43xx_restore_context
,
248 .prepare_rtc_suspend
= am43xx_prepare_rtc_suspend
,
249 .prepare_rtc_resume
= am43xx_prepare_rtc_resume
,
250 .check_off_mode_enable
= am43xx_check_off_mode_enable
,
251 .get_rtc_base_addr
= am43xx_get_rtc_base_addr
,
254 static struct am33xx_pm_platform_data
*am33xx_pm_get_pdata(void)
258 else if (soc_is_am437x())
264 int __init
amx3_common_pm_init(void)
266 struct am33xx_pm_platform_data
*pdata
;
267 struct platform_device_info devinfo
;
269 pdata
= am33xx_pm_get_pdata();
271 memset(&devinfo
, 0, sizeof(devinfo
));
272 devinfo
.name
= "pm33xx";
273 devinfo
.data
= pdata
;
274 devinfo
.size_data
= sizeof(*pdata
);
276 platform_device_register_full(&devinfo
);