arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for Globalscale Marvell ESPRESSOBin Board
   4  * Copyright (C) 2016 Marvell
   5  *
   6  * Romain Perier <romain.perier@free-electrons.com>
   7  *
   8  */
   9
  10 /dts-v1/;
  11
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include "armada-372x.dtsi"
  14
  15 / {
  16         chosen {
  17                 stdout-path = "serial0:115200n8";
  18         };
  19
  20         memory@0 {
  21                 device_type = "memory";
  22                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  23         };
  24
  25         vcc_sd_reg1: regulator {
  26                 compatible = "regulator-gpio";
  27                 regulator-name = "vcc_sd1";
  28                 regulator-min-microvolt = <1800000>;
  29                 regulator-max-microvolt = <3300000>;
  30                 regulator-boot-on;
  31
  32                 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
  33                 gpios-states = <0>;
  34                 states = <1800000 0x1
  35                           3300000 0x0>;
  36                 enable-active-high;
  37         };
  38 };
  39
  40 /* J9 */
  41 &pcie0 {
  42         status = "okay";
  43         phys = <&comphy1 0>;
  44         pinctrl-names = "default";
  45         pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
  46 };
  47
  48 /* J6 */
  49 &sata {
  50         status = "okay";
  51         phys = <&comphy2 0>;
  52         phy-names = "sata-phy";
  53 };
  54
  55 /* J1 */
  56 &sdhci1 {
  57         wp-inverted;
  58         bus-width = <4>;
  59         cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
  60         marvell,pad-type = "sd";
  61         vqmmc-supply = <&vcc_sd_reg1>;
  62
  63         pinctrl-names = "default";
  64         pinctrl-0 = <&sdio_pins>;
  65         status = "okay";
  66 };
  67
  68 &spi0 {
  69         status = "okay";
  70
  71         flash@0 {
  72                 reg = <0>;
  73                 compatible = "jedec,spi-nor";
  74                 spi-max-frequency = <104000000>;
  75                 m25p,fast-read;
  76         };
  77 };
  78
  79 /* Exported on the micro USB connector J5 through an FTDI */
  80 &uart0 {
  81         pinctrl-names = "default";
  82         pinctrl-0 = <&uart1_pins>;
  83         status = "okay";
  84 };
  85
  86 /*
  87  * Connector J17 and J18 expose a number of different features. Some pins are
  88  * multiplexed. This is the case for instance for the following features:
  89  * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
  90  *   how to enable it. Beware that the signals are 1.8V TTL.
  91  * - I2C
  92  * - SPI
  93  * - MMC
  94  */
  95
  96 /* J7 */
  97 &usb3 {
  98         status = "okay";
  99 };
 100
 101 /* J8 */
 102 &usb2 {
 103         status = "okay";
 104 };
 105
 106 &mdio {
 107         switch0: switch0@1 {
 108                 compatible = "marvell,mv88e6085";
 109                 #address-cells = <1>;
 110                 #size-cells = <0>;
 111                 reg = <1>;
 112
 113                 dsa,member = <0 0>;
 114
 115                 ports {
 116                         #address-cells = <1>;
 117                         #size-cells = <0>;
 118
 119                         port@0 {
 120                                 reg = <0>;
 121                                 label = "cpu";
 122                                 ethernet = <&eth0>;
 123                                 phy-mode = "rgmii-id";
 124                                 fixed-link {
 125                                         speed = <1000>;
 126                                         full-duplex;
 127                                 };
 128                         };
 129
 130                         port@1 {
 131                                 reg = <1>;
 132                                 label = "wan";
 133                                 phy-handle = <&switch0phy0>;
 134                         };
 135
 136                         port@2 {
 137                                 reg = <2>;
 138                                 label = "lan0";
 139                                 phy-handle = <&switch0phy1>;
 140                         };
 141
 142                         port@3 {
 143                                 reg = <3>;
 144                                 label = "lan1";
 145                                 phy-handle = <&switch0phy2>;
 146                         };
 147
 148                 };
 149
 150                 mdio {
 151                         #address-cells = <1>;
 152                         #size-cells = <0>;
 153
 154                         switch0phy0: switch0phy0@11 {
 155                                 reg = <0x11>;
 156                         };
 157                         switch0phy1: switch0phy1@12 {
 158                                 reg = <0x12>;
 159                         };
 160                         switch0phy2: switch0phy2@13 {
 161                                 reg = <0x13>;
 162                         };
 163                 };
 164         };
 165 };
 166
 167 &eth0 {
 168         pinctrl-names = "default";
 169         pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
 170         phy-mode = "rgmii-id";
 171         status = "okay";
 172
 173         fixed-link {
 174                 speed = <1000>;
 175                 full-duplex;
 176         };
 177 };