arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device tree for the uDPU board.
   4  * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
   5  * Copyright (C) 2016 Marvell
   6  * Copyright (C) 2019 Methode Electronics
   7  * Copyright (C) 2019 Telus
   8  *
   9  * Vladimir Vid <vladimir.vid@sartura.hr>
  10  */
  11
  12 /dts-v1/;
  13
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include "armada-372x.dtsi"
  16
  17 / {
  18         model = "Methode uDPU Board";
  19         compatible = "methode,udpu", "marvell,armada3720";
  20
  21         chosen {
  22                 stdout-path = "serial0:115200n8";
  23         };
  24
  25         memory@0 {
  26                 device_type = "memory";
  27                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  28         };
  29
  30         leds {
  31                 pinctrl-names = "default";
  32                 compatible = "gpio-leds";
  33
  34                 power1 {
  35                         label = "udpu:green:power";
  36                         gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
  37                 };
  38
  39                 power2 {
  40                         label = "udpu:red:power";
  41                         gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
  42                 };
  43
  44                 network1 {
  45                         label = "udpu:green:network";
  46                         gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
  47                 };
  48
  49                 network2 {
  50                         label = "udpu:red:network";
  51                         gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
  52                 };
  53
  54                 alarm1 {
  55                         label = "udpu:green:alarm";
  56                         gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
  57                 };
  58
  59                 alarm2 {
  60                         label = "udpu:red:alarm";
  61                         gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
  62                 };
  63         };
  64
  65         sfp_eth0: sfp-eth0 {
  66                 compatible = "sff,sfp";
  67                 i2c-bus = <&i2c0>;
  68                 los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
  69                 mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
  70                 tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
  71                 tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
  72         };
  73
  74         sfp_eth1: sfp-eth1 {
  75                 compatible = "sff,sfp";
  76                 i2c-bus = <&i2c1>;
  77                 los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
  78                 mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
  79                 tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
  80                 tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
  81         };
  82 };
  83
  84 &sdhci0 {
  85         status = "okay";
  86         bus-width = <8>;
  87         mmc-ddr-1_8v;
  88         mmc-hs400-1_8v;
  89         marvell,pad-type = "fixed-1-8v";
  90         non-removable;
  91         no-sd;
  92         no-sdio;
  93 };
  94
  95 &spi0 {
  96         status = "okay";
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&spi_quad_pins>;
  99
 100         m25p80@0 {
 101                 compatible = "jedec,spi-nor";
 102                 reg = <0>;
 103                 spi-max-frequency = <54000000>;
 104
 105                 partitions {
 106                         compatible = "fixed-partitions";
 107                         #address-cells = <1>;
 108                         #size-cells = <1>;
 109                         /* only bootloader is located on the SPI */
 110                         partition@0 {
 111                                 label = "uboot";
 112                                 reg = <0 0x400000>;
 113                         };
 114                 };
 115         };
 116 };
 117
 118 &i2c0 {
 119         status = "okay";
 120         pinctrl-names = "default";
 121         pinctrl-0 = <&i2c1_pins>;
 122 };
 123
 124 &i2c1 {
 125         status = "okay";
 126         pinctrl-names = "default";
 127         pinctrl-0 = <&i2c2_pins>;
 128
 129         lm75@48 {
 130                 status = "okay";
 131                 compatible = "lm75";
 132                 reg = <0x48>;
 133         };
 134
 135         lm75@49 {
 136                 status = "okay";
 137                 compatible = "lm75";
 138                 reg = <0x49>;
 139         };
 140 };
 141
 142 &eth0 {
 143         phy-mode = "sgmii";
 144         status = "okay";
 145         managed = "in-band-status";
 146         sfp = <&sfp_eth0>;
 147 };
 148
 149 &eth1 {
 150         phy-mode = "sgmii";
 151         status = "okay";
 152         managed = "in-band-status";
 153         sfp = <&sfp_eth1>;
 154 };
 155
 156 &usb3 {
 157         status = "okay";
 158 };
 159
 160 &uart0 {
 161         status = "okay";
 162 };