1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_ALTERNATIVE_H
3 #define __ASM_ALTERNATIVE_H
5 #include <asm/cpucaps.h>
8 #define ARM64_CB_PATCH ARM64_NCAPS
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/stddef.h>
15 #include <linux/stringify.h>
18 s32 orig_offset
; /* offset to original instruction */
19 s32 alt_offset
; /* offset to replacement instruction */
20 u16 cpufeature
; /* cpufeature bit set for replacement */
21 u8 orig_len
; /* size of original instruction(s) */
22 u8 alt_len
; /* size of new instruction(s), <= orig_len */
25 typedef void (*alternative_cb_t
)(struct alt_instr
*alt
,
26 __le32
*origptr
, __le32
*updptr
, int nr_inst
);
28 void __init
apply_boot_alternatives(void);
29 void __init
apply_alternatives_all(void);
30 bool alternative_is_applied(u16 cpufeature
);
33 void apply_alternatives_module(void *start
, size_t length
);
35 static inline void apply_alternatives_module(void *start
, size_t length
) { }
38 #define ALTINSTR_ENTRY(feature) \
39 " .word 661b - .\n" /* label */ \
40 " .word 663f - .\n" /* new instruction */ \
41 " .hword " __stringify(feature) "\n" /* feature bit */ \
42 " .byte 662b-661b\n" /* source len */ \
43 " .byte 664f-663f\n" /* replacement len */
45 #define ALTINSTR_ENTRY_CB(feature, cb) \
46 " .word 661b - .\n" /* label */ \
47 " .word " __stringify(cb) "- .\n" /* callback */ \
48 " .hword " __stringify(feature) "\n" /* feature bit */ \
49 " .byte 662b-661b\n" /* source len */ \
50 " .byte 664f-663f\n" /* replacement len */
53 * alternative assembly primitive:
55 * If any of these .org directive fail, it means that insn1 and insn2
56 * don't have the same length. This used to be written as
58 * .if ((664b-663b) != (662b-661b))
59 * .error "Alternatives instruction length mismatch"
62 * but most assemblers die if insn1 or insn2 have a .inst. This should
63 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
64 * containing commit 4e4d08cf7399b606 or c1baaddf8861).
66 * Alternatives with callbacks do not generate replacement instructions.
68 #define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
69 ".if "__stringify(cfg_enabled)" == 1\n" \
73 ".pushsection .altinstructions,\"a\"\n" \
74 ALTINSTR_ENTRY(feature) \
76 ".pushsection .altinstr_replacement, \"a\"\n" \
81 ".org . - (664b-663b) + (662b-661b)\n\t" \
82 ".org . - (662b-661b) + (664b-663b)\n" \
85 #define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \
86 ".if "__stringify(cfg_enabled)" == 1\n" \
90 ".pushsection .altinstructions,\"a\"\n" \
91 ALTINSTR_ENTRY_CB(feature, cb) \
97 #define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
98 __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
100 #define ALTERNATIVE_CB(oldinstr, cb) \
101 __ALTERNATIVE_CFG_CB(oldinstr, ARM64_CB_PATCH, 1, cb)
104 #include <asm/assembler.h>
106 .macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
107 .word \orig_offset
- .
108 .word
\alt_offset
- .
114 .macro alternative_insn insn1
, insn2
, cap
, enable
= 1
117 662: .pushsection
.altinstructions
, "a"
118 altinstruction_entry
661b
, 663f
, \cap
, 662b
-661b
, 664f
-663f
120 .pushsection
.altinstr_replacement
, "ax"
123 .org
. - (664b
-663b
) + (662b
-661b
)
124 .org
. - (662b
-661b
) + (664b
-663b
)
129 * Alternative sequences
131 * The code for the case where the capability is not present will be
132 * assembled and linked as normal. There are no restrictions on this
135 * The code for the case where the capability is present will be
136 * assembled into a special section to be used for dynamic patching.
137 * Code for that case must:
139 * 1. Be exactly the same length (in bytes) as the default code
142 * 2. Not contain a branch target that is used outside of the
143 * alternative sequence it is defined in (branches into an
144 * alternative sequence are not fixed up).
148 * Begin an alternative code sequence.
150 .macro alternative_if_not cap
151 .set
.Lasm_alt_mode
, 0
152 .pushsection
.altinstructions
, "a"
153 altinstruction_entry
661f
, 663f
, \cap
, 662f
-661f
, 664f
-663f
158 .macro alternative_if cap
159 .set
.Lasm_alt_mode
, 1
160 .pushsection
.altinstructions
, "a"
161 altinstruction_entry
663f
, 661f
, \cap
, 664f
-663f
, 662f
-661f
163 .pushsection
.altinstr_replacement
, "ax"
164 .align
2 /* So GAS knows label 661 is suitably aligned */
168 .macro alternative_cb cb
169 .set
.Lasm_alt_mode
, 0
170 .pushsection
.altinstructions
, "a"
171 altinstruction_entry
661f
, \cb
, ARM64_CB_PATCH
, 662f
-661f
, 0
177 * Provide the other half of the alternative code sequence.
179 .macro alternative_else
181 .if .Lasm_alt_mode
==0
182 .pushsection
.altinstr_replacement
, "ax"
190 * Complete an alternative code sequence.
192 .macro alternative_endif
194 .if .Lasm_alt_mode
==0
197 .org
. - (664b
-663b
) + (662b
-661b
)
198 .org
. - (662b
-661b
) + (664b
-663b
)
202 * Callback-based alternative epilogue
204 .macro alternative_cb_end
209 * Provides a trivial alternative or default sequence consisting solely
210 * of NOPs. The number of NOPs is chosen automatically to match the
213 .macro alternative_else_nop_endif
215 nops (662b
-661b
) / AARCH64_INSN_SIZE
219 #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
220 alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
222 .macro user_alt
, label
, oldinstr
, newinstr
, cond
223 9999: alternative_insn
"\oldinstr", "\newinstr", \cond
224 _ASM_EXTABLE
9999b
, \label
228 * Generate the assembly for UAO alternatives with exception table entries.
229 * This is complicated as there is no post-increment or pair versions of the
230 * unprivileged instructions, and USER() only works for single instructions.
232 #ifdef CONFIG_ARM64_UAO
233 .macro uao_ldp l
, reg1
, reg2
, addr
, post_inc
234 alternative_if_not ARM64_HAS_UAO
235 8888: ldp
\reg
1, \reg
2, [\addr
], \post_inc
;
240 ldtr
\reg
2, [\addr
, #8];
241 add
\addr
, \addr
, \post_inc
;
244 _asm_extable
8888b
,\l
;
245 _asm_extable
8889b
,\l
;
248 .macro uao_stp l
, reg1
, reg2
, addr
, post_inc
249 alternative_if_not ARM64_HAS_UAO
250 8888: stp
\reg
1, \reg
2, [\addr
], \post_inc
;
255 sttr
\reg
2, [\addr
, #8];
256 add
\addr
, \addr
, \post_inc
;
259 _asm_extable
8888b
,\l
;
260 _asm_extable
8889b
,\l
;
263 .macro uao_user_alternative l
, inst
, alt_inst
, reg
, addr
, post_inc
264 alternative_if_not ARM64_HAS_UAO
265 8888: \inst
\reg
, [\addr
], \post_inc
;
268 \alt_inst
\reg
, [\addr
];
269 add
\addr
, \addr
, \post_inc
;
272 _asm_extable
8888b
,\l
;
275 .macro uao_ldp l
, reg1
, reg2
, addr
, post_inc
276 USER(\l
, ldp
\reg
1, \reg
2, [\addr
], \post_inc
)
278 .macro uao_stp l
, reg1
, reg2
, addr
, post_inc
279 USER(\l
, stp
\reg
1, \reg
2, [\addr
], \post_inc
)
281 .macro uao_user_alternative l
, inst
, alt_inst
, reg
, addr
, post_inc
282 USER(\l
, \inst
\reg
, [\addr
], \post_inc
)
286 #endif /* __ASSEMBLY__ */
289 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
291 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
292 * N.B. If CONFIG_FOO is specified, but not selected, the whole block
293 * will be omitted, including oldinstr.
295 #define ALTERNATIVE(oldinstr, newinstr, ...) \
296 _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
298 #endif /* __ASM_ALTERNATIVE_H */