treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / arch / arm64 / include / asm / asm-uaccess.h
blobf68a0e64482a1eb2acceb89a000b517175aba6d4
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_ASM_UACCESS_H
3 #define __ASM_ASM_UACCESS_H
5 #include <asm/alternative.h>
6 #include <asm/kernel-pgtable.h>
7 #include <asm/mmu.h>
8 #include <asm/sysreg.h>
9 #include <asm/assembler.h>
12 * User access enabling/disabling macros.
14 #ifdef CONFIG_ARM64_SW_TTBR0_PAN
15 .macro __uaccess_ttbr0_disable, tmp1
16 mrs \tmp1, ttbr1_el1 // swapper_pg_dir
17 bic \tmp1, \tmp1, #TTBR_ASID_MASK
18 sub \tmp1, \tmp1, #RESERVED_TTBR0_SIZE // reserved_ttbr0 just before swapper_pg_dir
19 msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1
20 isb
21 add \tmp1, \tmp1, #RESERVED_TTBR0_SIZE
22 msr ttbr1_el1, \tmp1 // set reserved ASID
23 isb
24 .endm
26 .macro __uaccess_ttbr0_enable, tmp1, tmp2
27 get_current_task \tmp1
28 ldr \tmp1, [\tmp1, #TSK_TI_TTBR0] // load saved TTBR0_EL1
29 mrs \tmp2, ttbr1_el1
30 extr \tmp2, \tmp2, \tmp1, #48
31 ror \tmp2, \tmp2, #16
32 msr ttbr1_el1, \tmp2 // set the active ASID
33 isb
34 msr ttbr0_el1, \tmp1 // set the non-PAN TTBR0_EL1
35 isb
36 .endm
38 .macro uaccess_ttbr0_disable, tmp1, tmp2
39 alternative_if_not ARM64_HAS_PAN
40 save_and_disable_irq \tmp2 // avoid preemption
41 __uaccess_ttbr0_disable \tmp1
42 restore_irq \tmp2
43 alternative_else_nop_endif
44 .endm
46 .macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3
47 alternative_if_not ARM64_HAS_PAN
48 save_and_disable_irq \tmp3 // avoid preemption
49 __uaccess_ttbr0_enable \tmp1, \tmp2
50 restore_irq \tmp3
51 alternative_else_nop_endif
52 .endm
53 #else
54 .macro uaccess_ttbr0_disable, tmp1, tmp2
55 .endm
57 .macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3
58 .endm
59 #endif
61 #endif