1 // SPDX-License-Identifier: GPL-2.0
3 * XLP8XX Device Tree Source for EVP boards
8 model = "netlogic,XLP-EVP";
9 compatible = "netlogic,xlp";
16 compatible = "simple-bus";
17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
20 serial0: serial@30000 {
21 device_type = "serial";
22 compatible = "ns16550";
23 reg = <0 0x30100 0xa00>;
26 clock-frequency = <133333333>;
27 interrupt-parent = <&pic>;
30 serial1: serial@31000 {
31 device_type = "serial";
32 compatible = "ns16550";
33 reg = <0 0x31100 0xa00>;
36 clock-frequency = <133333333>;
37 interrupt-parent = <&pic>;
41 compatible = "opencores,i2c-ocores";
44 reg = <0 0x32100 0xa00>;
47 clock-frequency = <32000000>;
48 interrupt-parent = <&pic>;
52 compatible = "opencores,i2c-ocores";
55 reg = <0 0x33100 0xa00>;
58 clock-frequency = <32000000>;
59 interrupt-parent = <&pic>;
63 compatible = "dallas,ds1374";
68 compatible = "national,lm90";
73 compatible = "netlogic,xlp-pic";
75 #interrupt-cells = <1>;
76 reg = <0 0x4000 0x200>;
81 compatible = "cfi-flash";
85 reg = <1 0 0x1000000>;
89 reg = <0x0 0x100000>; /* 1M */
95 reg = <0x100000 0x100000>; /* 1M */
100 reg = <0x200000 0x500000>; /* 5M */
105 reg = <0x700000 0x800000>; /* 8M */
110 reg = <0xf00000 0x100000>; /* 1M */
115 gpio: xlp_gpio@34100 {
116 compatible = "netlogic,xlp832-gpio";
117 reg = <0 0x34100 0x1000>;
121 #interrupt-cells = <2>;
122 interrupt-parent = <&pic>;
124 interrupt-controller;
129 bootargs = "console=ttyS0,115200 rdinit=/sbin/init";