arch/mips/include/asm/ginvt.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __MIPS_ASM_GINVT_H__
   3 #define __MIPS_ASM_GINVT_H__
   4
   5 #include <asm/mipsregs.h>
   6
   7 enum ginvt_type {
   8         GINVT_FULL,
   9         GINVT_VA,
  10         GINVT_MMID,
  11 };
  12
  13 #ifdef TOOLCHAIN_SUPPORTS_GINV
  14 # define _ASM_SET_GINV  ".set   ginv\n"
  15 #else
  16 _ASM_MACRO_1R1I(ginvt, rs, type,
  17                 _ASM_INSN_IF_MIPS(0x7c0000bd | (__rs << 21) | (\\type << 8))
  18                 _ASM_INSN32_IF_MM(0x0000717c | (__rs << 16) | (\\type << 9)));
  19 # define _ASM_SET_GINV
  20 #endif
  21
  22 static __always_inline void ginvt(unsigned long addr, enum ginvt_type type)
  23 {
  24         asm volatile(
  25                 ".set   push\n"
  26                 _ASM_SET_GINV
  27                 "       ginvt   %0, %1\n"
  28                 ".set   pop"
  29                 : /* no outputs */
  30                 : "r"(addr), "i"(type)
  31                 : "memory");
  32 }
  33
  34 static inline void ginvt_full(void)
  35 {
  36         ginvt(0, GINVT_FULL);
  37 }
  38
  39 static inline void ginvt_va(unsigned long addr)
  40 {
  41         addr &= PAGE_MASK << 1;
  42         ginvt(addr, GINVT_VA);
  43 }
  44
  45 static inline void ginvt_mmid(void)
  46 {
  47         ginvt(0, GINVT_MMID);
  48 }
  49
  50 static inline void ginvt_va_mmid(unsigned long addr)
  51 {
  52         addr &= PAGE_MASK << 1;
  53         ginvt(addr, GINVT_VA | GINVT_MMID);
  54 }
  55
  56 #endif /* __MIPS_ASM_GINVT_H__ */