arch/mips/include/asm/mach-au1x00/gpio-au1300.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * gpio-au1300.h -- GPIO control for Au1300 GPIC and compatibles.
   4  *
   5  * Copyright (c) 2009-2011 Manuel Lauss <manuel.lauss@googlemail.com>
   6  */
   7
   8 #ifndef _GPIO_AU1300_H_
   9 #define _GPIO_AU1300_H_
  10
  11 #include <asm/addrspace.h>
  12 #include <asm/io.h>
  13 #include <asm/mach-au1x00/au1000.h>
  14
  15 struct gpio;
  16 struct gpio_chip;
  17
  18 /* with the current GPIC design, up to 128 GPIOs are possible.
  19  * The only implementation so far is in the Au1300, which has 75 externally
  20  * available GPIOs.
  21  */
  22 #define AU1300_GPIO_BASE        0
  23 #define AU1300_GPIO_NUM         75
  24 #define AU1300_GPIO_MAX         (AU1300_GPIO_BASE + AU1300_GPIO_NUM - 1)
  25
  26 #define AU1300_GPIC_ADDR        \
  27         (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR)
  28
  29 static inline int au1300_gpio_get_value(unsigned int gpio)
  30 {
  31         void __iomem *roff = AU1300_GPIC_ADDR;
  32         int bit;
  33
  34         gpio -= AU1300_GPIO_BASE;
  35         roff += GPIC_GPIO_BANKOFF(gpio);
  36         bit = GPIC_GPIO_TO_BIT(gpio);
  37         return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit;
  38 }
  39
  40 static inline int au1300_gpio_direction_input(unsigned int gpio)
  41 {
  42         void __iomem *roff = AU1300_GPIC_ADDR;
  43         unsigned long bit;
  44
  45         gpio -= AU1300_GPIO_BASE;
  46
  47         roff += GPIC_GPIO_BANKOFF(gpio);
  48         bit = GPIC_GPIO_TO_BIT(gpio);
  49         __raw_writel(bit, roff + AU1300_GPIC_DEVCLR);
  50         wmb();
  51
  52         return 0;
  53 }
  54
  55 static inline int au1300_gpio_set_value(unsigned int gpio, int v)
  56 {
  57         void __iomem *roff = AU1300_GPIC_ADDR;
  58         unsigned long bit;
  59
  60         gpio -= AU1300_GPIO_BASE;
  61
  62         roff += GPIC_GPIO_BANKOFF(gpio);
  63         bit = GPIC_GPIO_TO_BIT(gpio);
  64         __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL
  65                                     : AU1300_GPIC_PINVALCLR));
  66         wmb();
  67
  68         return 0;
  69 }
  70
  71 static inline int au1300_gpio_direction_output(unsigned int gpio, int v)
  72 {
  73         /* hw switches to output automatically */
  74         return au1300_gpio_set_value(gpio, v);
  75 }
  76
  77 static inline int au1300_gpio_to_irq(unsigned int gpio)
  78 {
  79         return AU1300_FIRST_INT + (gpio - AU1300_GPIO_BASE);
  80 }
  81
  82 static inline int au1300_irq_to_gpio(unsigned int irq)
  83 {
  84         return (irq - AU1300_FIRST_INT) + AU1300_GPIO_BASE;
  85 }
  86
  87 static inline int au1300_gpio_is_valid(unsigned int gpio)
  88 {
  89         int ret;
  90
  91         switch (alchemy_get_cputype()) {
  92         case ALCHEMY_CPU_AU1300:
  93                 ret = ((gpio >= AU1300_GPIO_BASE) && (gpio <= AU1300_GPIO_MAX));
  94                 break;
  95         default:
  96                 ret = 0;
  97         }
  98         return ret;
  99 }
 100
 101 static inline int au1300_gpio_cansleep(unsigned int gpio)
 102 {
 103         return 0;
 104 }
 105
 106 /* hardware remembers gpio 0-63 levels on powerup */
 107 static inline int au1300_gpio_getinitlvl(unsigned int gpio)
 108 {
 109         void __iomem *roff = AU1300_GPIC_ADDR;
 110         unsigned long v;
 111
 112         if (unlikely(gpio > 63))
 113                 return 0;
 114         else if (gpio > 31) {
 115                 gpio -= 32;
 116                 roff += 4;
 117         }
 118
 119         v = __raw_readl(roff + AU1300_GPIC_RSTVAL);
 120         return (v >> gpio) & 1;
 121 }
 122
 123 /**********************************************************************/
 124
 125 /* Linux gpio framework integration.
 126 *
 127 * 4 use cases of Alchemy GPIOS:
 128 *(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y:
 129 *       Board must register gpiochips.
 130 *(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n:
 131 *       A gpiochip for the 75 GPIOs is registered.
 132 *
 133 *(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y:
 134 *       the boards' gpio.h must provide the linux gpio wrapper functions,
 135 *
 136 *(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n:
 137 *       inlinable gpio functions are provided which enable access to the
 138 *       Au1300 gpios only by using the numbers straight out of the data-
 139 *       sheets.
 140
 141 * Cases 1 and 3 are intended for boards which want to provide their own
 142 * GPIO namespace and -operations (i.e. for example you have 8 GPIOs
 143 * which are in part provided by spare Au1300 GPIO pins and in part by
 144 * an external FPGA but you still want them to be accessible in linux
 145 * as gpio0-7. The board can of course use the alchemy_gpioX_* functions
 146 * as required).
 147 */
 148
 149 #ifndef CONFIG_GPIOLIB
 150
 151 #ifdef CONFIG_ALCHEMY_GPIOINT_AU1300
 152
 153 #ifndef CONFIG_ALCHEMY_GPIO_INDIRECT    /* case (4) */
 154
 155 static inline int gpio_direction_input(unsigned int gpio)
 156 {
 157         return au1300_gpio_direction_input(gpio);
 158 }
 159
 160 static inline int gpio_direction_output(unsigned int gpio, int v)
 161 {
 162         return au1300_gpio_direction_output(gpio, v);
 163 }
 164
 165 static inline int gpio_get_value(unsigned int gpio)
 166 {
 167         return au1300_gpio_get_value(gpio);
 168 }
 169
 170 static inline void gpio_set_value(unsigned int gpio, int v)
 171 {
 172         au1300_gpio_set_value(gpio, v);
 173 }
 174
 175 static inline int gpio_get_value_cansleep(unsigned gpio)
 176 {
 177         return gpio_get_value(gpio);
 178 }
 179
 180 static inline void gpio_set_value_cansleep(unsigned gpio, int value)
 181 {
 182         gpio_set_value(gpio, value);
 183 }
 184
 185 static inline int gpio_is_valid(unsigned int gpio)
 186 {
 187         return au1300_gpio_is_valid(gpio);
 188 }
 189
 190 static inline int gpio_cansleep(unsigned int gpio)
 191 {
 192         return au1300_gpio_cansleep(gpio);
 193 }
 194
 195 static inline int gpio_to_irq(unsigned int gpio)
 196 {
 197         return au1300_gpio_to_irq(gpio);
 198 }
 199
 200 static inline int irq_to_gpio(unsigned int irq)
 201 {
 202         return au1300_irq_to_gpio(irq);
 203 }
 204
 205 static inline int gpio_request(unsigned int gpio, const char *label)
 206 {
 207         return 0;
 208 }
 209
 210 static inline int gpio_request_one(unsigned gpio,
 211                                         unsigned long flags, const char *label)
 212 {
 213         return 0;
 214 }
 215
 216 static inline int gpio_request_array(struct gpio *array, size_t num)
 217 {
 218         return 0;
 219 }
 220
 221 static inline void gpio_free(unsigned gpio)
 222 {
 223 }
 224
 225 static inline void gpio_free_array(struct gpio *array, size_t num)
 226 {
 227 }
 228
 229 static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
 230 {
 231         return -ENOSYS;
 232 }
 233
 234 static inline void gpio_unexport(unsigned gpio)
 235 {
 236 }
 237
 238 static inline int gpio_export(unsigned gpio, bool direction_may_change)
 239 {
 240         return -ENOSYS;
 241 }
 242
 243 static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
 244 {
 245         return -ENOSYS;
 246 }
 247
 248 static inline int gpio_export_link(struct device *dev, const char *name,
 249                                    unsigned gpio)
 250 {
 251         return -ENOSYS;
 252 }
 253
 254 #endif  /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
 255
 256 #endif  /* CONFIG_ALCHEMY_GPIOINT_AU1300 */
 257
 258 #endif  /* CONFIG GPIOLIB */
 259
 260 #endif /* _GPIO_AU1300_H_ */