arch/mips/include/asm/mach-loongson32/loongson1.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
   4  *
   5  * Register mappings for Loongson 1
   6  */
   7
   8 #ifndef __ASM_MACH_LOONGSON32_LOONGSON1_H
   9 #define __ASM_MACH_LOONGSON32_LOONGSON1_H
  10
  11 #if defined(CONFIG_LOONGSON1_LS1B)
  12 #define DEFAULT_MEMSIZE                 64      /* If no memsize provided */
  13 #elif defined(CONFIG_LOONGSON1_LS1C)
  14 #define DEFAULT_MEMSIZE                 32
  15 #endif
  16
  17 /* Loongson 1 Register Bases */
  18 #define LS1X_MUX_BASE                   0x1fd00420
  19 #define LS1X_INTC_BASE                  0x1fd01040
  20 #define LS1X_GPIO0_BASE                 0x1fd010c0
  21 #define LS1X_GPIO1_BASE                 0x1fd010c4
  22 #define LS1X_DMAC_BASE                  0x1fd01160
  23 #define LS1X_CBUS_BASE                  0x1fd011c0
  24 #define LS1X_EHCI_BASE                  0x1fe00000
  25 #define LS1X_OHCI_BASE                  0x1fe08000
  26 #define LS1X_GMAC0_BASE                 0x1fe10000
  27 #define LS1X_GMAC1_BASE                 0x1fe20000
  28
  29 #define LS1X_UART0_BASE                 0x1fe40000
  30 #define LS1X_UART1_BASE                 0x1fe44000
  31 #define LS1X_UART2_BASE                 0x1fe48000
  32 #define LS1X_UART3_BASE                 0x1fe4c000
  33 #define LS1X_CAN0_BASE                  0x1fe50000
  34 #define LS1X_CAN1_BASE                  0x1fe54000
  35 #define LS1X_I2C0_BASE                  0x1fe58000
  36 #define LS1X_I2C1_BASE                  0x1fe68000
  37 #define LS1X_I2C2_BASE                  0x1fe70000
  38 #define LS1X_PWM0_BASE                  0x1fe5c000
  39 #define LS1X_PWM1_BASE                  0x1fe5c010
  40 #define LS1X_PWM2_BASE                  0x1fe5c020
  41 #define LS1X_PWM3_BASE                  0x1fe5c030
  42 #define LS1X_WDT_BASE                   0x1fe5c060
  43 #define LS1X_RTC_BASE                   0x1fe64000
  44 #define LS1X_AC97_BASE                  0x1fe74000
  45 #define LS1X_NAND_BASE                  0x1fe78000
  46 #define LS1X_CLK_BASE                   0x1fe78030
  47
  48 #include <regs-clk.h>
  49 #include <regs-mux.h>
  50 #include <regs-pwm.h>
  51 #include <regs-rtc.h>
  52 #include <regs-wdt.h>
  53
  54 #endif /* __ASM_MACH_LOONGSON32_LOONGSON1_H */