1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* thread_info.h: MIPS low-level thread information
4 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
5 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
8 #ifndef _ASM_THREAD_INFO_H
9 #define _ASM_THREAD_INFO_H
16 #include <asm/processor.h>
19 * low level task data that entry.S needs immediate access to
20 * - this struct should fit entirely inside of one cache line
21 * - this struct shares the supervisor stack pages
22 * - if the contents of this structure are changed, the assembly constants
23 * must also be changed
26 struct task_struct
*task
; /* main task structure */
27 unsigned long flags
; /* low level flags */
28 unsigned long tp_value
; /* thread pointer */
29 __u32 cpu
; /* current CPU */
30 int preempt_count
; /* 0 => preemptable, <0 => BUG */
31 mm_segment_t addr_limit
; /*
32 * thread address space limit:
33 * 0x7fffffff for user-thead
34 * 0xffffffff for kernel-thread
37 long syscall
; /* syscall number */
41 * macros/functions for gaining access to the thread information structure
43 #define INIT_THREAD_INFO(tsk) \
46 .flags = _TIF_FIXADE, \
48 .preempt_count = INIT_PREEMPT_COUNT, \
49 .addr_limit = KERNEL_DS, \
53 * A pointer to the struct thread_info for the currently executing thread is
54 * held in register $28/$gp.
56 * We declare __current_thread_info as a global register variable rather than a
57 * local register variable within current_thread_info() because clang doesn't
58 * support explicit local register variables.
60 * When building the VDSO we take care not to declare the global register
61 * variable because this causes GCC to not preserve the value of $28/$gp in
62 * functions that change its value (which is common in the PIC VDSO when
63 * accessing the GOT). Since the VDSO shouldn't be accessing
64 * __current_thread_info anyway we declare it extern in order to cause a link
65 * failure if it's referenced.
68 extern struct thread_info
*__current_thread_info
;
70 register struct thread_info
*__current_thread_info
__asm__("$28");
73 static inline struct thread_info
*current_thread_info(void)
75 return __current_thread_info
;
78 #endif /* !__ASSEMBLY__ */
80 /* thread information allocation */
81 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
82 #define THREAD_SIZE_ORDER (1)
84 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
85 #define THREAD_SIZE_ORDER (2)
87 #ifdef CONFIG_PAGE_SIZE_8KB
88 #define THREAD_SIZE_ORDER (1)
90 #ifdef CONFIG_PAGE_SIZE_16KB
91 #define THREAD_SIZE_ORDER (0)
93 #ifdef CONFIG_PAGE_SIZE_32KB
94 #define THREAD_SIZE_ORDER (0)
96 #ifdef CONFIG_PAGE_SIZE_64KB
97 #define THREAD_SIZE_ORDER (0)
100 #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
101 #define THREAD_MASK (THREAD_SIZE - 1UL)
103 #define STACK_WARN (THREAD_SIZE / 8)
106 * thread information flags
107 * - these are process state flags that various assembly files may need to
109 * - pending work-to-be-done flags are in LSW
110 * - other flags in MSW
112 #define TIF_SIGPENDING 1 /* signal pending */
113 #define TIF_NEED_RESCHED 2 /* rescheduling necessary */
114 #define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */
115 #define TIF_SECCOMP 4 /* secure computing */
116 #define TIF_NOTIFY_RESUME 5 /* callback before returning to user */
117 #define TIF_UPROBE 6 /* breakpointed or singlestepping */
118 #define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
119 #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
120 #define TIF_MEMDIE 18 /* is terminating due to OOM killer */
121 #define TIF_NOHZ 19 /* in adaptive nohz mode */
122 #define TIF_FIXADE 20 /* Fix address errors in software */
123 #define TIF_LOGADE 21 /* Log address errors to syslog */
124 #define TIF_32BIT_REGS 22 /* 32-bit general purpose registers */
125 #define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */
126 #define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
127 #define TIF_LOAD_WATCH 25 /* If set, load watch registers */
128 #define TIF_SYSCALL_TRACEPOINT 26 /* syscall tracepoint instrumentation */
129 #define TIF_32BIT_FPREGS 27 /* 32-bit floating point registers */
130 #define TIF_HYBRID_FPREGS 28 /* 64b FP registers, odd singles in bits 63:32 of even doubles */
131 #define TIF_USEDMSA 29 /* MSA has been used this quantum */
132 #define TIF_MSA_CTX_LIVE 30 /* MSA context must be preserved */
133 #define TIF_SYSCALL_TRACE 31 /* syscall trace active */
135 #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
136 #define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
137 #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
138 #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
139 #define _TIF_SECCOMP (1<<TIF_SECCOMP)
140 #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
141 #define _TIF_UPROBE (1<<TIF_UPROBE)
142 #define _TIF_USEDFPU (1<<TIF_USEDFPU)
143 #define _TIF_NOHZ (1<<TIF_NOHZ)
144 #define _TIF_FIXADE (1<<TIF_FIXADE)
145 #define _TIF_LOGADE (1<<TIF_LOGADE)
146 #define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS)
147 #define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR)
148 #define _TIF_FPUBOUND (1<<TIF_FPUBOUND)
149 #define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH)
150 #define _TIF_32BIT_FPREGS (1<<TIF_32BIT_FPREGS)
151 #define _TIF_HYBRID_FPREGS (1<<TIF_HYBRID_FPREGS)
152 #define _TIF_USEDMSA (1<<TIF_USEDMSA)
153 #define _TIF_MSA_CTX_LIVE (1<<TIF_MSA_CTX_LIVE)
154 #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
156 #define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
157 _TIF_SYSCALL_AUDIT | \
158 _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP)
160 /* work to do in syscall_trace_leave() */
161 #define _TIF_WORK_SYSCALL_EXIT (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
162 _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
164 /* work to do on interrupt/exception return */
165 #define _TIF_WORK_MASK \
166 (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME | \
168 /* work to do on any return to u-space */
169 #define _TIF_ALLWORK_MASK (_TIF_NOHZ | _TIF_WORK_MASK | \
170 _TIF_WORK_SYSCALL_EXIT | \
171 _TIF_SYSCALL_TRACEPOINT)
174 * We stash processor id into a COP0 register to retrieve it fast
175 * at kernel exception entry.
177 #if defined(CONFIG_MIPS_PGD_C0_CONTEXT)
178 #define SMP_CPUID_REG 20, 0 /* XCONTEXT */
179 #define ASM_SMP_CPUID_REG $20
180 #define SMP_CPUID_PTRSHIFT 48
182 #define SMP_CPUID_REG 4, 0 /* CONTEXT */
183 #define ASM_SMP_CPUID_REG $4
184 #define SMP_CPUID_PTRSHIFT 23
188 #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 3)
190 #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 2)
193 #define ASM_CPUID_MFC0 MFC0
194 #define UASM_i_CPUID_MFC0 UASM_i_MFC0
196 #endif /* __KERNEL__ */
197 #endif /* _ASM_THREAD_INFO_H */