arch/parisc/include/asm/barrier.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __ASM_BARRIER_H
   3 #define __ASM_BARRIER_H
   4
   5 #ifndef __ASSEMBLY__
   6
   7 /* The synchronize caches instruction executes as a nop on systems in
   8    which all memory references are performed in order. */
   9 #define synchronize_caches() __asm__ __volatile__ ("sync" : : : "memory")
  10
  11 #if defined(CONFIG_SMP)
  12 #define mb()            do { synchronize_caches(); } while (0)
  13 #define rmb()           mb()
  14 #define wmb()           mb()
  15 #define dma_rmb()       mb()
  16 #define dma_wmb()       mb()
  17 #else
  18 #define mb()            barrier()
  19 #define rmb()           barrier()
  20 #define wmb()           barrier()
  21 #define dma_rmb()       barrier()
  22 #define dma_wmb()       barrier()
  23 #endif
  24
  25 #define __smp_mb()      mb()
  26 #define __smp_rmb()     mb()
  27 #define __smp_wmb()     mb()
  28
  29 #include <asm-generic/barrier.h>
  30
  31 #endif /* !__ASSEMBLY__ */
  32 #endif /* __ASM_BARRIER_H */