treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / arch / parisc / kernel / processor.c
blob13f771f74ee3bce3857cf2d9c3088d8e7243929b
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Initial setup-routines for HP 9000 based hardware.
5 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
6 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
7 * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
8 * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
9 * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
10 * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/mm.h>
17 #include <linux/module.h>
18 #include <linux/seq_file.h>
19 #include <linux/random.h>
20 #include <linux/slab.h>
21 #include <linux/cpu.h>
22 #include <asm/param.h>
23 #include <asm/cache.h>
24 #include <asm/hardware.h> /* for register_parisc_driver() stuff */
25 #include <asm/processor.h>
26 #include <asm/page.h>
27 #include <asm/pdc.h>
28 #include <asm/pdcpat.h>
29 #include <asm/irq.h> /* for struct irq_region */
30 #include <asm/parisc-device.h>
32 struct system_cpuinfo_parisc boot_cpu_data __ro_after_init;
33 EXPORT_SYMBOL(boot_cpu_data);
34 #ifdef CONFIG_PA8X00
35 int _parisc_requires_coherency __ro_after_init;
36 EXPORT_SYMBOL(_parisc_requires_coherency);
37 #endif
39 DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
42 ** PARISC CPU driver - claim "device" and initialize CPU data structures.
44 ** Consolidate per CPU initialization into (mostly) one module.
45 ** Monarch CPU will initialize boot_cpu_data which shouldn't
46 ** change once the system has booted.
48 ** The callback *should* do per-instance initialization of
49 ** everything including the monarch. "Per CPU" init code in
50 ** setup.c:start_parisc() has migrated here and start_parisc()
51 ** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
53 ** The goal of consolidating CPU initialization into one place is
54 ** to make sure all CPUs get initialized the same way.
55 ** The code path not shared is how PDC hands control of the CPU to the OS.
56 ** The initialization of OS data structures is the same (done below).
59 /**
60 * init_cpu_profiler - enable/setup per cpu profiling hooks.
61 * @cpunum: The processor instance.
63 * FIXME: doesn't do much yet...
65 static void
66 init_percpu_prof(unsigned long cpunum)
71 /**
72 * processor_probe - Determine if processor driver should claim this device.
73 * @dev: The device which has been found.
75 * Determine if processor driver should claim this chip (return 0) or not
76 * (return 1). If so, initialize the chip and tell other partners in crime
77 * they have work to do.
79 static int __init processor_probe(struct parisc_device *dev)
81 unsigned long txn_addr;
82 unsigned long cpuid;
83 struct cpuinfo_parisc *p;
84 struct pdc_pat_cpu_num cpu_info = { };
86 #ifdef CONFIG_SMP
87 if (num_online_cpus() >= nr_cpu_ids) {
88 printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
89 return 1;
91 #else
92 if (boot_cpu_data.cpu_count > 0) {
93 printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
94 return 1;
96 #endif
98 /* logical CPU ID and update global counter
99 * May get overwritten by PAT code.
101 cpuid = boot_cpu_data.cpu_count;
102 txn_addr = dev->hpa.start; /* for legacy PDC */
103 cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;
105 #ifdef CONFIG_64BIT
106 if (is_pdc_pat()) {
107 ulong status;
108 unsigned long bytecnt;
109 pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
111 pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
112 if (!pa_pdc_cell)
113 panic("couldn't allocate memory for PDC_PAT_CELL!");
115 status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
116 dev->mod_index, PA_VIEW, pa_pdc_cell);
118 BUG_ON(PDC_OK != status);
120 /* verify it's the same as what do_pat_inventory() found */
121 BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
122 BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
124 txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
126 kfree(pa_pdc_cell);
128 /* get the cpu number */
129 status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
130 BUG_ON(PDC_OK != status);
132 pr_info("Logical CPU #%lu is physical cpu #%lu at location "
133 "0x%lx with hpa %pa\n",
134 cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
135 &dev->hpa.start);
137 #undef USE_PAT_CPUID
138 #ifdef USE_PAT_CPUID
139 /* We need contiguous numbers for cpuid. Firmware's notion
140 * of cpuid is for physical CPUs and we just don't care yet.
141 * We'll care when we need to query PAT PDC about a CPU *after*
142 * boot time (ie shutdown a CPU from an OS perspective).
144 if (cpu_info.cpu_num >= NR_CPUS) {
145 printk(KERN_WARNING "IGNORING CPU at %pa,"
146 " cpu_slot_id > NR_CPUS"
147 " (%ld > %d)\n",
148 &dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
149 /* Ignore CPU since it will only crash */
150 boot_cpu_data.cpu_count--;
151 return 1;
152 } else {
153 cpuid = cpu_info.cpu_num;
155 #endif
157 #endif
159 p = &per_cpu(cpu_data, cpuid);
160 boot_cpu_data.cpu_count++;
162 /* initialize counters - CPU 0 gets it_value set in time_init() */
163 if (cpuid)
164 memset(p, 0, sizeof(struct cpuinfo_parisc));
166 p->loops_per_jiffy = loops_per_jiffy;
167 p->dev = dev; /* Save IODC data in case we need it */
168 p->hpa = dev->hpa.start; /* save CPU hpa */
169 p->cpuid = cpuid; /* save CPU id */
170 p->txn_addr = txn_addr; /* save CPU IRQ address */
171 p->cpu_num = cpu_info.cpu_num;
172 p->cpu_loc = cpu_info.cpu_loc;
174 store_cpu_topology(cpuid);
176 #ifdef CONFIG_SMP
178 ** FIXME: review if any other initialization is clobbered
179 ** for boot_cpu by the above memset().
181 init_percpu_prof(cpuid);
182 #endif
185 ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
186 ** OS control. RENDEZVOUS is the default state - see mem_set above.
187 ** p->state = STATE_RENDEZVOUS;
190 #if 0
191 /* CPU 0 IRQ table is statically allocated/initialized */
192 if (cpuid) {
193 struct irqaction actions[];
196 ** itimer and ipi IRQ handlers are statically initialized in
197 ** arch/parisc/kernel/irq.c. ie Don't need to register them.
199 actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
200 if (!actions) {
201 /* not getting it's own table, share with monarch */
202 actions = cpu_irq_actions[0];
205 cpu_irq_actions[cpuid] = actions;
207 #endif
210 * Bring this CPU up now! (ignore bootstrap cpuid == 0)
212 #ifdef CONFIG_SMP
213 if (cpuid) {
214 set_cpu_present(cpuid, true);
215 cpu_up(cpuid);
217 #endif
219 return 0;
223 * collect_boot_cpu_data - Fill the boot_cpu_data structure.
225 * This function collects and stores the generic processor information
226 * in the boot_cpu_data structure.
228 void __init collect_boot_cpu_data(void)
230 unsigned long cr16_seed;
231 char orig_prod_num[64], current_prod_num[64], serial_no[64];
233 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
235 cr16_seed = get_cycles();
236 add_device_randomness(&cr16_seed, sizeof(cr16_seed));
238 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
240 /* get CPU-Model Information... */
241 #define p ((unsigned long *)&boot_cpu_data.pdc.model)
242 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
243 printk(KERN_INFO
244 "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
245 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
247 add_device_randomness(&boot_cpu_data.pdc.model,
248 sizeof(boot_cpu_data.pdc.model));
250 #undef p
252 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) {
253 printk(KERN_INFO "vers %08lx\n",
254 boot_cpu_data.pdc.versions);
256 add_device_randomness(&boot_cpu_data.pdc.versions,
257 sizeof(boot_cpu_data.pdc.versions));
260 if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) {
261 printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
262 (boot_cpu_data.pdc.cpuid >> 5) & 127,
263 boot_cpu_data.pdc.cpuid & 31,
264 boot_cpu_data.pdc.cpuid);
266 add_device_randomness(&boot_cpu_data.pdc.cpuid,
267 sizeof(boot_cpu_data.pdc.cpuid));
270 if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
271 printk(KERN_INFO "capabilities 0x%lx\n",
272 boot_cpu_data.pdc.capabilities);
274 if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
275 printk(KERN_INFO "model %s\n",
276 boot_cpu_data.pdc.sys_model_name);
278 dump_stack_set_arch_desc("%s", boot_cpu_data.pdc.sys_model_name);
280 boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
281 boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
283 boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
284 boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
285 boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
287 #ifdef CONFIG_PA8X00
288 _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
289 (boot_cpu_data.cpu_type == mako2);
290 #endif
292 if (pdc_model_platform_info(orig_prod_num, current_prod_num, serial_no) == PDC_OK) {
293 printk(KERN_INFO "product %s, original product %s, S/N: %s\n",
294 current_prod_num[0] ? current_prod_num : "n/a",
295 orig_prod_num, serial_no);
296 add_device_randomness(orig_prod_num, strlen(orig_prod_num));
297 add_device_randomness(current_prod_num, strlen(current_prod_num));
298 add_device_randomness(serial_no, strlen(serial_no));
304 * init_per_cpu - Handle individual processor initializations.
305 * @cpunum: logical processor number.
307 * This function handles initialization for *every* CPU
308 * in the system:
310 * o Set "default" CPU width for trap handlers
312 * o Enable FP coprocessor
313 * REVISIT: this could be done in the "code 22" trap handler.
314 * (frowands idea - that way we know which processes need FP
315 * registers saved on the interrupt stack.)
316 * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
317 * formatted printing of %lx for example (double divides I think)
319 * o Enable CPU profiling hooks.
321 int __init init_per_cpu(int cpunum)
323 int ret;
324 struct pdc_coproc_cfg coproc_cfg;
326 set_firmware_width();
327 ret = pdc_coproc_cfg(&coproc_cfg);
329 store_cpu_topology(cpunum);
331 if(ret >= 0 && coproc_cfg.ccr_functional) {
332 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
334 /* FWIW, FP rev/model is a more accurate way to determine
335 ** CPU type. CPU rev/model has some ambiguous cases.
337 per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
338 per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
340 if (cpunum == 0)
341 printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
342 cpunum, coproc_cfg.revision, coproc_cfg.model);
345 ** store status register to stack (hopefully aligned)
346 ** and clear the T-bit.
348 asm volatile ("fstd %fr0,8(%sp)");
350 } else {
351 printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
352 " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
353 #ifdef CONFIG_64BIT
354 "Halting Machine - FP required\n"
355 #endif
356 , coproc_cfg.ccr_functional);
357 #ifdef CONFIG_64BIT
358 mdelay(100); /* previous chars get pushed to console */
359 panic("FP CoProc not reported");
360 #endif
363 /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
364 init_percpu_prof(cpunum);
366 return ret;
370 * Display CPU info for all CPUs.
373 show_cpuinfo (struct seq_file *m, void *v)
375 unsigned long cpu;
377 for_each_online_cpu(cpu) {
378 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
379 #ifdef CONFIG_SMP
380 if (0 == cpuinfo->hpa)
381 continue;
382 #endif
383 seq_printf(m, "processor\t: %lu\n"
384 "cpu family\t: PA-RISC %s\n",
385 cpu, boot_cpu_data.family_name);
387 seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
389 /* cpu MHz */
390 seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
391 boot_cpu_data.cpu_hz / 1000000,
392 boot_cpu_data.cpu_hz % 1000000 );
394 #ifdef CONFIG_PARISC_CPU_TOPOLOGY
395 seq_printf(m, "physical id\t: %d\n",
396 topology_physical_package_id(cpu));
397 seq_printf(m, "siblings\t: %d\n",
398 cpumask_weight(topology_core_cpumask(cpu)));
399 seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
400 #endif
402 seq_printf(m, "capabilities\t:");
403 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
404 seq_puts(m, " os32");
405 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
406 seq_puts(m, " os64");
407 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
408 seq_puts(m, " iopdir_fdc");
409 switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
410 case PDC_MODEL_NVA_SUPPORTED:
411 seq_puts(m, " nva_supported");
412 break;
413 case PDC_MODEL_NVA_SLOW:
414 seq_puts(m, " nva_slow");
415 break;
416 case PDC_MODEL_NVA_UNSUPPORTED:
417 seq_puts(m, " needs_equivalent_aliasing");
418 break;
420 seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
422 seq_printf(m, "model\t\t: %s\n"
423 "model name\t: %s\n",
424 boot_cpu_data.pdc.sys_model_name,
425 cpuinfo->dev ?
426 cpuinfo->dev->name : "Unknown");
428 seq_printf(m, "hversion\t: 0x%08x\n"
429 "sversion\t: 0x%08x\n",
430 boot_cpu_data.hversion,
431 boot_cpu_data.sversion );
433 /* print cachesize info */
434 show_cache_info(m);
436 seq_printf(m, "bogomips\t: %lu.%02lu\n",
437 cpuinfo->loops_per_jiffy / (500000 / HZ),
438 (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
440 seq_printf(m, "software id\t: %ld\n\n",
441 boot_cpu_data.pdc.model.sw_id);
443 return 0;
446 static const struct parisc_device_id processor_tbl[] __initconst = {
447 { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
448 { 0, }
451 static struct parisc_driver cpu_driver __refdata = {
452 .name = "CPU",
453 .id_table = processor_tbl,
454 .probe = processor_probe
458 * processor_init - Processor initialization procedure.
460 * Register this driver.
462 void __init processor_init(void)
464 register_parisc_driver(&cpu_driver);