1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC8544 DS Device Tree Source
5 * Copyright 2007, 2008 Freescale Semiconductor Inc.
8 /include/ "mpc8544si-pre.dtsi"
12 compatible = "MPC8544DS", "MPC85xxDS";
15 device_type = "memory";
16 reg = <0 0 0 0>; // Filled by U-Boot
19 board_lbc: lbc: localbus@e0005000 {
20 reg = <0 0xe0005000 0 0x1000>;
22 ranges = <0x0 0x0 0x0 0xff800000 0x800000>;
25 board_soc: soc: soc8544@e0000000 {
26 ranges = <0x0 0x0 0xe0000000 0x100000>;
30 reg = <0 0xe0008000 0 0x1000>;
31 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
32 0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
33 clock-frequency = <66666666>;
34 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
37 /* IDSEL 0x11 J17 Slot 1 */
38 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
39 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
40 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
41 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
43 /* IDSEL 0x12 J16 Slot 2 */
45 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
46 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
47 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
48 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
52 reg = <0x0 0xe0009000 0x0 0x1000>;
53 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
54 0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
56 ranges = <0x2000000 0x0 0x80000000
57 0x2000000 0x0 0x80000000
67 reg = <0x0 0xe000a000 0x0 0x1000>;
68 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
69 0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
71 ranges = <0x2000000 0x0 0xa0000000
72 0x2000000 0x0 0xa0000000
81 board_pci3: pci3: pcie@e000b000 {
82 reg = <0x0 0xe000b000 0x0 0x1000>;
83 ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
84 0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
86 ranges = <0x2000000 0x0 0xb0000000
87 0x2000000 0x0 0xb0000000
98 * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings
99 * for interrupt-map & interrupt-map-mask
102 /include/ "mpc8544si-post.dtsi"
103 /include/ "mpc8544ds.dtsi"