2 * P1025 RDB Device Tree Source (32-bit address map)
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35 /include/ "p1021si-pre.dtsi"
37 model = "fsl,P1025RDB";
38 compatible = "fsl,P1025RDB";
41 device_type = "memory";
44 lbc: localbus@ffe05000 {
45 reg = <0 0xffe05000 0 0x1000>;
47 /* NOR, NAND Flashes */
48 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
49 0x1 0x0 0x0 0xff800000 0x00040000>;
53 ranges = <0x0 0x0 0xffe00000 0x100000>;
57 ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
58 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
59 reg = <0 0xffe09000 0 0x1000>;
61 ranges = <0x2000000 0x0 0xe0000000
62 0x2000000 0x0 0xe0000000
72 reg = <0 0xffe0a000 0 0x1000>;
73 ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
74 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
76 ranges = <0x2000000 0x0 0xe0000000
77 0x2000000 0x0 0xe0000000
87 ranges = <0x0 0x0 0xffe80000 0x40000>;
88 reg = <0 0xffe80000 0 0x480>;
91 status = "disabled"; /* no firmware loaded */
94 device_type = "network";
95 compatible = "ucc_geth";
96 rx-clock-name = "clk12";
97 tx-clock-name = "clk9";
99 phy-handle = <&qe_phy0>;
100 phy-connection-type = "mii";
104 qe_phy0: ethernet-phy@0 {
105 interrupt-parent = <&mpic>;
106 interrupts = <4 1 0 0>;
109 qe_phy1: ethernet-phy@3 {
110 interrupt-parent = <&mpic>;
111 interrupts = <5 1 0 0>;
116 device_type = "tbi-phy";
121 device_type = "network";
122 compatible = "ucc_geth";
123 rx-clock-name = "none";
124 tx-clock-name = "clk13";
125 pio-handle = <&pio2>;
126 phy-handle = <&qe_phy1>;
127 phy-connection-type = "rmii";
132 /include/ "p1025rdb.dtsi"
133 /include/ "p1021si-post.dtsi"