arch/powerpc/boot/dts/fsl/t1024qds.dts

   1 /*
   2  * T1024 QDS Device Tree Source
   3  *
   4  * Copyright 2014 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /include/ "t102xsi-pre.dtsi"
  36
  37 / {
  38         model = "fsl,T1024QDS";
  39         compatible = "fsl,T1024QDS";
  40         #address-cells = <2>;
  41         #size-cells = <2>;
  42         interrupt-parent = <&mpic>;
  43
  44         reserved-memory {
  45                 #address-cells = <2>;
  46                 #size-cells = <2>;
  47                 ranges;
  48
  49                 bman_fbpr: bman-fbpr {
  50                         size = <0 0x1000000>;
  51                         alignment = <0 0x1000000>;
  52                 };
  53
  54                 qman_fqd: qman-fqd {
  55                         size = <0 0x400000>;
  56                         alignment = <0 0x400000>;
  57                 };
  58
  59                 qman_pfdr: qman-pfdr {
  60                         size = <0 0x2000000>;
  61                         alignment = <0 0x2000000>;
  62                 };
  63         };
  64
  65         ifc: localbus@ffe124000 {
  66                 reg = <0xf 0xfe124000 0 0x2000>;
  67                 ranges = <0 0 0xf 0xe8000000 0x08000000
  68                           2 0 0xf 0xff800000 0x00010000
  69                           3 0 0xf 0xffdf0000 0x00008000>;
  70
  71                 nor@0,0 {
  72                         #address-cells = <1>;
  73                         #size-cells = <1>;
  74                         compatible = "cfi-flash";
  75                         reg = <0x0 0x0 0x8000000>;
  76                         bank-width = <2>;
  77                         device-width = <1>;
  78                 };
  79
  80                 nand@2,0 {
  81                         #address-cells = <1>;
  82                         #size-cells = <1>;
  83                         compatible = "fsl,ifc-nand";
  84                         reg = <0x2 0x0 0x10000>;
  85                 };
  86
  87                 board-control@3,0 {
  88                         #address-cells = <1>;
  89                         #size-cells = <1>;
  90                         compatible = "fsl,tetra-fpga", "fsl,fpga-qixis";
  91                         reg = <3 0 0x300>;
  92                         ranges = <0 3 0 0x300>;
  93                 };
  94         };
  95
  96         memory {
  97                 device_type = "memory";
  98         };
  99
 100         dcsr: dcsr@f00000000 {
 101                 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
 102         };
 103
 104         bportals: bman-portals@ff4000000 {
 105                 ranges = <0x0 0xf 0xf4000000 0x2000000>;
 106         };
 107
 108         qportals: qman-portals@ff6000000 {
 109                 ranges = <0x0 0xf 0xf6000000 0x2000000>;
 110         };
 111
 112         soc: soc@ffe000000 {
 113                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 114                 reg = <0xf 0xfe000000 0 0x00001000>;
 115                 spi@110000 {
 116                         flash@0 {
 117                                 #address-cells = <1>;
 118                                 #size-cells = <1>;
 119                                 compatible = "micron,n25q128a11", "jedec,spi-nor";  /* 16MB */
 120                                 reg = <0>;
 121                                 spi-max-frequency = <10000000>;
 122                         };
 123
 124                         flash@1 {
 125                                 #address-cells = <1>;
 126                                 #size-cells = <1>;
 127                                 compatible = "sst,sst25wf040", "jedec,spi-nor";  /* 512KB */
 128                                 reg = <1>;
 129                                 spi-max-frequency = <10000000>;
 130                         };
 131
 132                         flash@2 {
 133                                 #address-cells = <1>;
 134                                 #size-cells = <1>;
 135                                 compatible = "eon,en25s64", "jedec,spi-nor";   /* 8MB */
 136                                 reg = <2>;
 137                                 spi-max-frequency = <10000000>;
 138                         };
 139
 140                         slic@2 {
 141                                 compatible = "maxim,ds26522";
 142                                 reg = <2>;
 143                                 spi-max-frequency = <2000000>;
 144                         };
 145
 146                         slic@3 {
 147                                 compatible = "maxim,ds26522";
 148                                 reg = <3>;
 149                                 spi-max-frequency = <2000000>;
 150                         };
 151                 };
 152
 153                 i2c@118000 {
 154                         pca9547@77 {
 155                                 compatible = "nxp,pca9547";
 156                                 reg = <0x77>;
 157                                 #address-cells = <1>;
 158                                 #size-cells = <0>;
 159
 160                                 i2c@0 {
 161                                         #address-cells = <1>;
 162                                         #size-cells = <0>;
 163                                         reg = <0x0>;
 164
 165                                         eeprom@50 {
 166                                                 compatible = "atmel,24c512";
 167                                                 reg = <0x50>;
 168                                         };
 169
 170                                         eeprom@51 {
 171                                                 compatible = "atmel,24c02";
 172                                                 reg = <0x51>;
 173                                         };
 174
 175                                         eeprom@57 {
 176                                                 compatible = "atmel,24c02";
 177                                                 reg = <0x57>;
 178                                         };
 179                                 };
 180
 181                                 i2c@2 {
 182                                         #address-cells = <1>;
 183                                         #size-cells = <0>;
 184                                         reg = <0x2>;
 185
 186                                         ina220@40 {
 187                                                 compatible = "ti,ina220";
 188                                                 reg = <0x40>;
 189                                                 shunt-resistor = <1000>;
 190                                         };
 191
 192                                         ina220@41 {
 193                                                 compatible = "ti,ina220";
 194                                                 reg = <0x41>;
 195                                                 shunt-resistor = <1000>;
 196                                         };
 197                                 };
 198
 199                                 i2c@3 {
 200                                         #address-cells = <1>;
 201                                         #size-cells = <0>;
 202                                         reg = <0x3>;
 203
 204                                         adt7461@4c {
 205                                                 /* Thermal Monitor */
 206                                                 compatible = "adi,adt7461";
 207                                                 reg = <0x4c>;
 208                                         };
 209
 210                                         eeprom@55 {
 211                                                 compatible = "atmel,24c02";
 212                                                 reg = <0x55>;
 213                                         };
 214
 215                                         eeprom@56 {
 216                                                 compatible = "atmel,24c512";
 217                                                 reg = <0x56>;
 218                                         };
 219
 220                                         eeprom@57 {
 221                                                 compatible = "atmel,24c512";
 222                                                 reg = <0x57>;
 223                                         };
 224                                 };
 225                         };
 226                         rtc@68 {
 227                                 compatible = "dallas,ds3232";
 228                                 reg = <0x68>;
 229                                 interrupts = <0x5 0x1 0 0>;
 230                         };
 231                 };
 232         };
 233
 234         pci0: pcie@ffe240000 {
 235                 reg = <0xf 0xfe240000 0 0x10000>;
 236                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000
 237                           0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>;
 238                 pcie@0 {
 239                         ranges = <0x02000000 0 0xe0000000
 240                                   0x02000000 0 0xe0000000
 241                                   0 0x10000000
 242
 243                                   0x01000000 0 0x00000000
 244                                   0x01000000 0 0x00000000
 245                                   0 0x00010000>;
 246                 };
 247         };
 248
 249         pci1: pcie@ffe250000 {
 250                 reg = <0xf 0xfe250000 0 0x10000>;
 251                 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
 252                           0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>;
 253                 pcie@0 {
 254                         ranges = <0x02000000 0 0xe0000000
 255                                   0x02000000 0 0xe0000000
 256                                   0 0x10000000
 257
 258                                   0x01000000 0 0x00000000
 259                                   0x01000000 0 0x00000000
 260                                   0 0x00010000>;
 261                 };
 262         };
 263
 264         pci2: pcie@ffe260000 {
 265                 reg = <0xf 0xfe260000 0 0x10000>;
 266                 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
 267                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
 268                 pcie@0 {
 269                         ranges = <0x02000000 0 0xe0000000
 270                                   0x02000000 0 0xe0000000
 271                                   0 0x10000000
 272
 273                                   0x01000000 0 0x00000000
 274                                   0x01000000 0 0x00000000
 275                                   0 0x00010000>;
 276                 };
 277         };
 278 };
 279
 280 #include "t1024si-post.dtsi"