2 * T1040D4RDB/T1042D4RDB Device Tree Source
4 * Copyright 2015 Freescale Semiconductor Inc.
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41 bman_fbpr: bman-fbpr {
43 alignment = <0 0x1000000>;
47 alignment = <0 0x400000>;
49 qman_pfdr: qman-pfdr {
51 alignment = <0 0x2000000>;
55 ifc: localbus@ffe124000 {
56 reg = <0xf 0xfe124000 0 0x2000>;
57 ranges = <0 0 0xf 0xe8000000 0x08000000
58 2 0 0xf 0xff800000 0x00010000
59 3 0 0xf 0xffdf0000 0x00008000>;
64 compatible = "cfi-flash";
65 reg = <0x0 0x0 0x8000000>;
73 compatible = "fsl,ifc-nand";
74 reg = <0x2 0x0 0x10000>;
78 compatible = "fsl,t1040d4rdb-cpld";
84 device_type = "memory";
87 dcsr: dcsr@f00000000 {
88 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
91 bportals: bman-portals@ff4000000 {
92 ranges = <0x0 0xf 0xf4000000 0x2000000>;
95 qportals: qman-portals@ff6000000 {
96 ranges = <0x0 0xf 0xf6000000 0x2000000>;
100 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
101 reg = <0xf 0xfe000000 0 0x00001000>;
105 #address-cells = <1>;
107 compatible = "micron,n25q512ax3", "jedec,spi-nor";
110 spi-max-frequency = <10000000>;
113 compatible = "maxim,ds26522";
115 spi-max-frequency = <2000000>; /* input clock */
118 compatible = "maxim,ds26522";
120 spi-max-frequency = <2000000>; /* input clock */
125 compatible = "adi,adt7461";
130 compatible = "dallas,ds1337";
132 interrupts = <0x2 0x1 0 0>;
139 * Child nodes of mux depend on which i2c
140 * devices are connected via the mini PCI
141 * connector slot1, the mini PCI connector
142 * slot2, the HDMI connector, and the PEX
143 * slot. Systems with such devices attached
144 * should provide a wrapper .dts file that
145 * includes this one, and adds those nodes
147 compatible = "nxp,pca9546";
149 #address-cells = <1>;
156 pci0: pcie@ffe240000 {
157 reg = <0xf 0xfe240000 0 0x10000>;
158 ranges = <0x02000000 0 0xe0000000 0xc 0x0 0x0 0x10000000
159 0x01000000 0 0x0 0xf 0xf8000000 0x0 0x00010000>;
161 ranges = <0x02000000 0 0xe0000000
162 0x02000000 0 0xe0000000
165 0x01000000 0 0x00000000
166 0x01000000 0 0x00000000
171 pci1: pcie@ffe250000 {
172 reg = <0xf 0xfe250000 0 0x10000>;
173 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
174 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
176 ranges = <0x02000000 0 0xe0000000
177 0x02000000 0 0xe0000000
180 0x01000000 0 0x00000000
181 0x01000000 0 0x00000000
186 pci2: pcie@ffe260000 {
187 reg = <0xf 0xfe260000 0 0x10000>;
188 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
189 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
191 ranges = <0x02000000 0 0xe0000000
192 0x02000000 0 0xe0000000
195 0x01000000 0 0x00000000
196 0x01000000 0 0x00000000
201 pci3: pcie@ffe270000 {
202 reg = <0xf 0xfe270000 0 0x10000>;
203 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
204 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
206 ranges = <0x02000000 0 0xe0000000
207 0x02000000 0 0xe0000000
210 0x01000000 0 0x00000000
211 0x01000000 0 0x00000000
217 ranges = <0x0 0xf 0xfe140000 0x40000>;
218 reg = <0xf 0xfe140000 0 0x480>;
223 compatible = "fsl,t1040-qe-si";
228 compatible = "fsl,t1040-qe-siram";
229 reg = <0x1000 0x800>;
233 compatible = "fsl,ucc-hdlc";
234 rx-clock-name = "clk8";
235 tx-clock-name = "clk9";
236 fsl,rx-sync-clock = "rsync_pin";
237 fsl,tx-sync-clock = "tsync_pin";
238 fsl,tx-timeslot-mask = <0xfffffffe>;
239 fsl,rx-timeslot-mask = <0xfffffffe>;
240 fsl,tdm-framer-type = "e1";
242 fsl,siram-entry-id = <0>;
246 ucc_serial: ucc@2200 {
247 compatible = "fsl,t1040-ucc-uart";
249 rx-clock-name = "brg2";
250 tx-clock-name = "brg2";