treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / arch / powerpc / boot / ps3-hvcall.S
blobff74102e8a7161d90c551f11e21f66eba2eba1be
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  PS3 bootwrapper hvcalls.
4  *
5  *  Copyright (C) 2007 Sony Computer Entertainment Inc.
6  *  Copyright 2007 Sony Corp.
7  */
9 #include "ppc_asm.h"
11         .machine "ppc64"
14  * The PS3 hypervisor uses a 64 bit "C" language calling convention.
15  * The routines here marshal arguments between the 32 bit wrapper
16  * program and the 64 bit hvcalls.
17  *
18  *  wrapper           lv1
19  *  32-bit (h,l)      64-bit
20  *
21  *  1: r3,r4          <-> r3
22  *  2: r5,r6          <-> r4
23  *  3: r7,r8          <-> r5
24  *  4: r9,r10         <-> r6
25  *  5: 8(r1),12(r1)   <-> r7
26  *  6: 16(r1),20(r1)  <-> r8
27  *  7: 24(r1),28(r1)  <-> r9
28  *  8: 32(r1),36(r1)  <-> r10
29  *
30  */
32 .macro GLOBAL name
33         .section ".text"
34         .balign 4
35         .globl \name
36 \name:
37 .endm
39 .macro NO_SUPPORT name
40         GLOBAL \name
41         b ps3_no_support
42 .endm
44 .macro HVCALL num
45         li r11, \num
46         .long 0x44000022
47         extsw r3, r3
48 .endm
50 .macro SAVE_LR offset=4
51         mflr r0
52         stw r0, \offset(r1)
53 .endm
55 .macro LOAD_LR offset=4
56         lwz r0, \offset(r1)
57         mtlr r0
58 .endm
60 .macro LOAD_64_REG target,high,low
61         sldi r11, \high, 32
62         or \target, r11, \low
63 .endm
65 .macro LOAD_64_STACK target,offset
66         ld \target, \offset(r1)
67 .endm
69 .macro LOAD_R3
70         LOAD_64_REG r3,r3,r4
71 .endm
73 .macro LOAD_R4
74         LOAD_64_REG r4,r5,r6
75 .endm
77 .macro LOAD_R5
78         LOAD_64_REG r5,r7,r8
79 .endm
81 .macro LOAD_R6
82         LOAD_64_REG r6,r9,r10
83 .endm
85 .macro LOAD_R7
86         LOAD_64_STACK r7,8
87 .endm
89 .macro LOAD_R8
90         LOAD_64_STACK r8,16
91 .endm
93 .macro LOAD_R9
94         LOAD_64_STACK r9,24
95 .endm
97 .macro LOAD_R10
98         LOAD_64_STACK r10,32
99 .endm
101 .macro LOAD_REGS_0
102         stwu 1,-16(1)
103         stw 3, 8(1)
104 .endm
106 .macro LOAD_REGS_5
107         LOAD_R3
108         LOAD_R4
109         LOAD_R5
110         LOAD_R6
111         LOAD_R7
112 .endm
114 .macro LOAD_REGS_6
115         LOAD_REGS_5
116         LOAD_R8
117 .endm
119 .macro LOAD_REGS_8
120         LOAD_REGS_6
121         LOAD_R9
122         LOAD_R10
123 .endm
125 .macro STORE_REGS_0_1
126         lwz r11, 8(r1)
127         std r4, 0(r11)
128         mr r4, r3
129         li r3, 0
130         addi r1,r1,16
131 .endm
133 .macro STORE_REGS_5_2
134         lwz r11, 16(r1)
135         std r4, 0(r11)
136         lwz r11, 20(r1)
137         std r5, 0(r11)
138 .endm
140 .macro STORE_REGS_6_1
141         lwz r11, 24(r1)
142         std r4, 0(r11)
143 .endm
145 GLOBAL lv1_get_logical_ppe_id
146         SAVE_LR
147         LOAD_REGS_0
148         HVCALL 69
149         STORE_REGS_0_1
150         LOAD_LR
151         blr
153 GLOBAL lv1_get_logical_partition_id
154         SAVE_LR
155         LOAD_REGS_0
156         HVCALL 74
157         STORE_REGS_0_1
158         LOAD_LR
159         blr
161 GLOBAL lv1_get_repository_node_value
162         SAVE_LR
163         LOAD_REGS_5
164         HVCALL 91
165         STORE_REGS_5_2
166         LOAD_LR
167         blr
169 GLOBAL lv1_panic
170         SAVE_LR
171         LOAD_REGS_8
172         HVCALL 255
173         LOAD_LR
174         blr