arch/powerpc/include/asm/book3s/pgtable.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_POWERPC_BOOK3S_PGTABLE_H
   3 #define _ASM_POWERPC_BOOK3S_PGTABLE_H
   4
   5 #ifdef CONFIG_PPC64
   6 #include <asm/book3s/64/pgtable.h>
   7 #else
   8 #include <asm/book3s/32/pgtable.h>
   9 #endif
  10
  11 #define FIRST_USER_ADDRESS      0UL
  12 #ifndef __ASSEMBLY__
  13 /* Insert a PTE, top-level function is out of line. It uses an inline
  14  * low level function in the respective pgtable-* files
  15  */
  16 extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
  17                        pte_t pte);
  18
  19
  20 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
  21 extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
  22                                  pte_t *ptep, pte_t entry, int dirty);
  23
  24 struct file;
  25 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
  26                                      unsigned long size, pgprot_t vma_prot);
  27 #define __HAVE_PHYS_MEM_ACCESS_PROT
  28
  29 /*
  30  * This gets called at the end of handling a page fault, when
  31  * the kernel has put a new PTE into the page table for the process.
  32  * We use it to ensure coherency between the i-cache and d-cache
  33  * for the page which has just been mapped in.
  34  * On machines which use an MMU hash table, we use this to put a
  35  * corresponding HPTE into the hash table ahead of time, instead of
  36  * waiting for the inevitable extra hash-table miss exception.
  37  */
  38 void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);
  39
  40 #endif /* __ASSEMBLY__ */
  41 #endif