arch/powerpc/include/asm/drmem.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * drmem.h: Power specific logical memory block representation
   4  *
   5  * Copyright 2017 IBM Corporation
   6  */
   7
   8 #ifndef _ASM_POWERPC_LMB_H
   9 #define _ASM_POWERPC_LMB_H
  10
  11 struct drmem_lmb {
  12         u64     base_addr;
  13         u32     drc_index;
  14         u32     aa_index;
  15         u32     flags;
  16 #ifdef CONFIG_MEMORY_HOTPLUG
  17         int     nid;
  18 #endif
  19 };
  20
  21 struct drmem_lmb_info {
  22         struct drmem_lmb        *lmbs;
  23         int                     n_lmbs;
  24         u32                     lmb_size;
  25 };
  26
  27 extern struct drmem_lmb_info *drmem_info;
  28
  29 #define for_each_drmem_lmb_in_range(lmb, start, end)            \
  30         for ((lmb) = (start); (lmb) <= (end); (lmb)++)
  31
  32 #define for_each_drmem_lmb(lmb)                                 \
  33         for_each_drmem_lmb_in_range((lmb),                      \
  34                 &drmem_info->lmbs[0],                           \
  35                 &drmem_info->lmbs[drmem_info->n_lmbs - 1])
  36
  37 /*
  38  * The of_drconf_cell_v1 struct defines the layout of the LMB data
  39  * specified in the ibm,dynamic-memory device tree property.
  40  * The property itself is a 32-bit value specifying the number of
  41  * LMBs followed by an array of of_drconf_cell_v1 entries, one
  42  * per LMB.
  43  */
  44 struct of_drconf_cell_v1 {
  45         __be64  base_addr;
  46         __be32  drc_index;
  47         __be32  reserved;
  48         __be32  aa_index;
  49         __be32  flags;
  50 };
  51
  52 /*
  53  * Version 2 of the ibm,dynamic-memory property is defined as a
  54  * 32-bit value specifying the number of LMB sets followed by an
  55  * array of of_drconf_cell_v2 entries, one per LMB set.
  56  */
  57 struct of_drconf_cell_v2 {
  58         u32     seq_lmbs;
  59         u64     base_addr;
  60         u32     drc_index;
  61         u32     aa_index;
  62         u32     flags;
  63 } __packed;
  64
  65 #define DRCONF_MEM_ASSIGNED     0x00000008
  66 #define DRCONF_MEM_AI_INVALID   0x00000040
  67 #define DRCONF_MEM_RESERVED     0x00000080
  68
  69 static inline u32 drmem_lmb_size(void)
  70 {
  71         return drmem_info->lmb_size;
  72 }
  73
  74 #define DRMEM_LMB_RESERVED      0x80000000
  75
  76 static inline void drmem_mark_lmb_reserved(struct drmem_lmb *lmb)
  77 {
  78         lmb->flags |= DRMEM_LMB_RESERVED;
  79 }
  80
  81 static inline void drmem_remove_lmb_reservation(struct drmem_lmb *lmb)
  82 {
  83         lmb->flags &= ~DRMEM_LMB_RESERVED;
  84 }
  85
  86 static inline bool drmem_lmb_reserved(struct drmem_lmb *lmb)
  87 {
  88         return lmb->flags & DRMEM_LMB_RESERVED;
  89 }
  90
  91 u64 drmem_lmb_memory_max(void);
  92 void __init walk_drmem_lmbs(struct device_node *dn,
  93                         void (*func)(struct drmem_lmb *, const __be32 **));
  94 int drmem_update_dt(void);
  95
  96 #ifdef CONFIG_PPC_PSERIES
  97 void __init walk_drmem_lmbs_early(unsigned long node,
  98                         void (*func)(struct drmem_lmb *, const __be32 **));
  99 #endif
 100
 101 static inline void invalidate_lmb_associativity_index(struct drmem_lmb *lmb)
 102 {
 103         lmb->aa_index = 0xffffffff;
 104 }
 105
 106 #ifdef CONFIG_MEMORY_HOTPLUG
 107 static inline void lmb_set_nid(struct drmem_lmb *lmb)
 108 {
 109         lmb->nid = memory_add_physaddr_to_nid(lmb->base_addr);
 110 }
 111 static inline void lmb_clear_nid(struct drmem_lmb *lmb)
 112 {
 113         lmb->nid = -1;
 114 }
 115 #else
 116 static inline void lmb_set_nid(struct drmem_lmb *lmb)
 117 {
 118 }
 119 static inline void lmb_clear_nid(struct drmem_lmb *lmb)
 120 {
 121 }
 122 #endif
 123
 124 #endif /* _ASM_POWERPC_LMB_H */