1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
5 #ifndef _ASM_POWERPC_HW_IRQ_H
6 #define _ASM_POWERPC_HW_IRQ_H
10 #include <linux/errno.h>
11 #include <linux/compiler.h>
12 #include <asm/ptrace.h>
13 #include <asm/processor.h>
18 * PACA flags in paca->irq_happened.
20 * This bits are set when interrupts occur while soft-disabled
21 * and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS
22 * is set whenever we manually hard disable.
24 #define PACA_IRQ_HARD_DIS 0x01
25 #define PACA_IRQ_DBELL 0x02
26 #define PACA_IRQ_EE 0x04
27 #define PACA_IRQ_DEC 0x08 /* Or FIT */
28 #define PACA_IRQ_EE_EDGE 0x10 /* BookE only */
29 #define PACA_IRQ_HMI 0x20
30 #define PACA_IRQ_PMI 0x40
33 * Some soft-masked interrupts must be hard masked until they are replayed
34 * (e.g., because the soft-masked handler does not clear the exception).
36 #ifdef CONFIG_PPC_BOOK3S
37 #define PACA_IRQ_MUST_HARD_MASK (PACA_IRQ_EE|PACA_IRQ_PMI)
39 #define PACA_IRQ_MUST_HARD_MASK (PACA_IRQ_EE)
43 * flags for paca->irq_soft_mask
45 #define IRQS_ENABLED 0
46 #define IRQS_DISABLED 1 /* local_irq_disable() interrupts */
47 #define IRQS_PMI_DISABLED 2
48 #define IRQS_ALL_DISABLED (IRQS_DISABLED | IRQS_PMI_DISABLED)
50 #endif /* CONFIG_PPC64 */
54 extern void replay_system_reset(void);
55 extern void __replay_interrupt(unsigned int vector
);
57 extern void timer_interrupt(struct pt_regs
*);
58 extern void timer_broadcast_interrupt(void);
59 extern void performance_monitor_exception(struct pt_regs
*regs
);
60 extern void WatchdogException(struct pt_regs
*regs
);
61 extern void unknown_exception(struct pt_regs
*regs
);
66 static inline notrace
unsigned long irq_soft_mask_return(void)
73 : "i" (offsetof(struct paca_struct
, irq_soft_mask
)));
79 * The "memory" clobber acts as both a compiler barrier
80 * for the critical section and as a clobber because
81 * we changed paca->irq_soft_mask
83 static inline notrace
void irq_soft_mask_set(unsigned long mask
)
85 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
87 * The irq mask must always include the STD bit if any are set.
89 * and interrupts don't get replayed until the standard
90 * interrupt (local_irq_disable()) is unmasked.
92 * Other masks must only provide additional masking beyond
93 * the standard, and they are also not replayed until the
94 * standard interrupt becomes unmasked.
96 * This could be changed, but it will require partial
97 * unmasks to be replayed, among other things. For now, take
98 * the simple approach.
100 WARN_ON(mask
&& !(mask
& IRQS_DISABLED
));
107 "i" (offsetof(struct paca_struct
, irq_soft_mask
))
111 static inline notrace
unsigned long irq_soft_mask_set_return(unsigned long mask
)
115 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
116 WARN_ON(mask
&& !(mask
& IRQS_DISABLED
));
120 "lbz %0,%1(13); stb %2,%1(13)"
122 : "i" (offsetof(struct paca_struct
, irq_soft_mask
)),
129 static inline notrace
unsigned long irq_soft_mask_or_return(unsigned long mask
)
131 unsigned long flags
, tmp
;
134 "lbz %0,%2(13); or %1,%0,%3; stb %1,%2(13)"
135 : "=&r" (flags
), "=r" (tmp
)
136 : "i" (offsetof(struct paca_struct
, irq_soft_mask
)),
140 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
141 WARN_ON((mask
| flags
) && !((mask
| flags
) & IRQS_DISABLED
));
147 static inline unsigned long arch_local_save_flags(void)
149 return irq_soft_mask_return();
152 static inline void arch_local_irq_disable(void)
154 irq_soft_mask_set(IRQS_DISABLED
);
157 extern void arch_local_irq_restore(unsigned long);
159 static inline void arch_local_irq_enable(void)
161 arch_local_irq_restore(IRQS_ENABLED
);
164 static inline unsigned long arch_local_irq_save(void)
166 return irq_soft_mask_set_return(IRQS_DISABLED
);
169 static inline bool arch_irqs_disabled_flags(unsigned long flags
)
171 return flags
& IRQS_DISABLED
;
174 static inline bool arch_irqs_disabled(void)
176 return arch_irqs_disabled_flags(arch_local_save_flags());
179 #ifdef CONFIG_PPC_BOOK3S
181 * To support disabling and enabling of irq with PMI, set of
182 * new powerpc_local_irq_pmu_save() and powerpc_local_irq_restore()
183 * functions are added. These macros are implemented using generic
184 * linux local_irq_* code from include/linux/irqflags.h.
186 #define raw_local_irq_pmu_save(flags) \
188 typecheck(unsigned long, flags); \
189 flags = irq_soft_mask_or_return(IRQS_DISABLED | \
190 IRQS_PMI_DISABLED); \
193 #define raw_local_irq_pmu_restore(flags) \
195 typecheck(unsigned long, flags); \
196 arch_local_irq_restore(flags); \
199 #ifdef CONFIG_TRACE_IRQFLAGS
200 #define powerpc_local_irq_pmu_save(flags) \
202 raw_local_irq_pmu_save(flags); \
203 trace_hardirqs_off(); \
205 #define powerpc_local_irq_pmu_restore(flags) \
207 if (raw_irqs_disabled_flags(flags)) { \
208 raw_local_irq_pmu_restore(flags); \
209 trace_hardirqs_off(); \
211 trace_hardirqs_on(); \
212 raw_local_irq_pmu_restore(flags); \
216 #define powerpc_local_irq_pmu_save(flags) \
218 raw_local_irq_pmu_save(flags); \
220 #define powerpc_local_irq_pmu_restore(flags) \
222 raw_local_irq_pmu_restore(flags); \
224 #endif /* CONFIG_TRACE_IRQFLAGS */
226 #endif /* CONFIG_PPC_BOOK3S */
228 #ifdef CONFIG_PPC_BOOK3E
229 #define __hard_irq_enable() wrtee(MSR_EE)
230 #define __hard_irq_disable() wrtee(0)
232 #define __hard_irq_enable() __mtmsrd(MSR_EE|MSR_RI, 1)
233 #define __hard_irq_disable() __mtmsrd(MSR_RI, 1)
236 #define hard_irq_disable() do { \
237 unsigned long flags; \
238 __hard_irq_disable(); \
239 flags = irq_soft_mask_set_return(IRQS_ALL_DISABLED); \
240 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \
241 if (!arch_irqs_disabled_flags(flags)) { \
242 asm ("stdx %%r1, 0, %1 ;" \
243 : "=m" (local_paca->saved_r1) \
244 : "b" (&local_paca->saved_r1)); \
245 trace_hardirqs_off(); \
249 static inline bool lazy_irq_pending(void)
251 return !!(get_paca()->irq_happened
& ~PACA_IRQ_HARD_DIS
);
255 * This is called by asynchronous interrupts to conditionally
256 * re-enable hard interrupts after having cleared the source
257 * of the interrupt. They are kept disabled if there is a different
258 * soft-masked interrupt pending that requires hard masking.
260 static inline void may_hard_irq_enable(void)
262 if (!(get_paca()->irq_happened
& PACA_IRQ_MUST_HARD_MASK
)) {
263 get_paca()->irq_happened
&= ~PACA_IRQ_HARD_DIS
;
268 static inline bool arch_irq_disabled_regs(struct pt_regs
*regs
)
270 return (regs
->softe
& IRQS_DISABLED
);
273 extern bool prep_irq_for_idle(void);
274 extern bool prep_irq_for_idle_irqsoff(void);
275 extern void irq_set_pending_from_srr1(unsigned long srr1
);
277 #define fini_irq_for_idle_irqsoff() trace_hardirqs_off();
279 extern void force_external_irq_replay(void);
281 #else /* CONFIG_PPC64 */
283 static inline unsigned long arch_local_save_flags(void)
288 static inline void arch_local_irq_restore(unsigned long flags
)
290 if (IS_ENABLED(CONFIG_BOOKE
))
296 static inline unsigned long arch_local_irq_save(void)
298 unsigned long flags
= arch_local_save_flags();
300 if (IS_ENABLED(CONFIG_BOOKE
))
302 else if (IS_ENABLED(CONFIG_PPC_8xx
))
305 mtmsr(flags
& ~MSR_EE
);
310 static inline void arch_local_irq_disable(void)
312 if (IS_ENABLED(CONFIG_BOOKE
))
314 else if (IS_ENABLED(CONFIG_PPC_8xx
))
317 mtmsr(mfmsr() & ~MSR_EE
);
320 static inline void arch_local_irq_enable(void)
322 if (IS_ENABLED(CONFIG_BOOKE
))
324 else if (IS_ENABLED(CONFIG_PPC_8xx
))
327 mtmsr(mfmsr() | MSR_EE
);
330 static inline bool arch_irqs_disabled_flags(unsigned long flags
)
332 return (flags
& MSR_EE
) == 0;
335 static inline bool arch_irqs_disabled(void)
337 return arch_irqs_disabled_flags(arch_local_save_flags());
340 #define hard_irq_disable() arch_local_irq_disable()
342 static inline bool arch_irq_disabled_regs(struct pt_regs
*regs
)
344 return !(regs
->msr
& MSR_EE
);
347 static inline void may_hard_irq_enable(void) { }
349 #endif /* CONFIG_PPC64 */
351 #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST
354 * interrupt-retrigger: should we handle this via lost interrupts and IPIs
355 * or should we not care like we do now ? --BenH.
359 #endif /* __ASSEMBLY__ */
360 #endif /* __KERNEL__ */
361 #endif /* _ASM_POWERPC_HW_IRQ_H */