treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / arch / powerpc / include / asm / perf_event.h
blob7426d7a90e1e1a2a7539e3e174974cb298ab4a29
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Performance event support - hardware-specific disambiguation
5 * For now this is a compile-time decision, but eventually it should be
6 * runtime. This would allow multiplatform perf event support for e300 (fsl
7 * embedded perf counters) plus server/classic, and would accommodate
8 * devices other than the core which provide their own performance counters.
10 * Copyright 2010 Freescale Semiconductor, Inc.
13 #ifdef CONFIG_PPC_PERF_CTRS
14 #include <asm/perf_event_server.h>
15 #endif
17 #ifdef CONFIG_FSL_EMB_PERF_EVENT
18 #include <asm/perf_event_fsl_emb.h>
19 #endif
21 #ifdef CONFIG_PERF_EVENTS
22 #include <asm/ptrace.h>
23 #include <asm/reg.h>
25 #define perf_arch_bpf_user_pt_regs(regs) &regs->user_regs
28 * Overload regs->result to specify whether we should use the MSR (result
29 * is zero) or the SIAR (result is non zero).
31 #define perf_arch_fetch_caller_regs(regs, __ip) \
32 do { \
33 (regs)->result = 0; \
34 (regs)->nip = __ip; \
35 (regs)->gpr[1] = current_stack_pointer(); \
36 asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \
37 } while (0)
39 /* To support perf_regs sier update */
40 extern bool is_sier_available(void);
41 #endif